Welcome to the community page of 3D-ICs
The industry is actively exploring 3D semiconductor technology for the next generation of logic and memory chips. This website is dedicated to keeping you informed about this exciting field. Our programs automatically mine the internet and provide you the latest news and literature.
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3D Packaging and TSV News
3D Packaging and TSV Blogs
Monolithic 3D Blogs
3D process once again triggered the IC industry development mode
NextGenLog: #CHIPS: "Learn Next-Gen Semiconductors at VLSI
"-Intel exec says fabless model 'collapsing"-'fab' or reality-?
Qualcomm's Nick Yu says “3D DRAM stacking has started—it's
Emerging Memories Take Stage at VLSI Symposium
Is Monolithic 3D IC a disruptive technology for the Semiconductor Industry?!
Building 3D-ICs: Tool Flow and Design Software
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3D Packaging and TSV Papers
Open3D Request for Technology: Interface Specifications for 3D Chip Design Flows
Thin Chips on the ITRS Roadmap
Guest Editorial: Special Issue on Testing of 3D Stacked Integrated Circuits
3D Architecture Implementation: A Survey
Lithography challenges for leading edge 3D packaging applications
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Monolithic 3D Papers
High-Speed Design and Broadband Modeling of Through-Strata-Vias (TSVs) in 3D Integration
The SuperB Silicon Vertex Tracker and 3D Vertical Integration
Variation-Tolerant and Low-Power Clock Network Design for 3D ICs
A Novel Methodology for Thermal Aware Silicon Area Estimation for 2D & 3D MPSoCs
3D Multiprocessor with 3D NoC Architecture Based on Tezzaron Technology
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