Welcome to the community page of 3D-ICs
The industry is actively exploring 3D semiconductor technology for the next generation of logic and memory chips. This website is dedicated to keeping you informed about this exciting field. Our programs automatically mine the internet and provide you the latest news and literature.
3D Packaging and TSV News
GloFo demos working 20nm TSV silicon - Fudzilla
GLOBALFOUNDRIES demonstrates 3D TSV capabilities on 20nm technology - ElectroIQ
TSMC expected to begin 20-nm line early
3-D integration takes spotlight at ISPD
MonolithIC 3D Inc. Granted its 30th Patent on 3D IC Technology - PR Web (press release)
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Monolithic 3D News
MonolithIC 3D Inc. Announces its Advisory Board Members
3D physical simulation tools provide superior FinFet predictability
IBM selects Altis as RF SOI foundry partner
MonolithIC 3D Inc. Granted its 30th Patent on 3D IC Technology
Please Help Me Understand IBM - Common Platform Technology Forum 2013
Globalfoundries commits to FDSOI process
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3D Packaging and TSV Blogs
Global Foundries Demonstrates 3D TSV Capabilities on 20 nm
Francoise Von Trapp created the event NCCAVS Joint User Group Meeting: 3D Packaging
Imagination, TSMC extend collaboration to FinFET and 3D ICs
Is the Cost Reduction Associated with Scaling Over? - Monolithic 3D
Could 3d chip technology extend Moore's law to 2030?
3D integration: different approaches for different goals | Riding the
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Monolithic 3D Blogs
Micron Shipped Record Amount of SSDs in the Recent Quarter
Predicting the ReRAM Roadmap | CBRAM/RRAM Blog
DNA 3D Nand Gate Bricks Would Be Able to Make a Computer with
Infinitely Expandable Computing Using Three Dimensional
Micron's Management Discusses Flash Memory and SSD F2Q 2013
Please Help Me Understand IBM - Common Platform Technology Forum 2013
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3D Packaging and TSV Papers
Guest Editorial: Special Issue on Testing of 3D Stacked Integrated Circuits
3D Architecture Implementation: A Survey
Lithography challenges for leading edge 3D packaging applications
Modeling and Experimentation: Characterization of Hot Spot Dissipation in 3D Stacks
Achieving fast and accurate extraction of 3D-IC layout structures
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