Monolithic 3D - BLOGS

Qualcomm Calls for Monolithic 3D IC | EE Times

dated 7th Jul

"Qualcomm is looking to monolithic 3D and smart circuit architectures to make up for the loss of traditional 2D process scaling as wafer costs for advanced nodes continue to increase." Speaking in a keynote at DAC 2014 in 

[Read more]

Qualcomm: Scaling down is not cost-economic anymore - so we are

dated 7th Jul

Over the course of three major industry conferences (VLSI 2013, IEDM 2013 and DAC 2014), executives of Qualcomm voiced a call for monolithic 3D "to extend the semiconductor roadmap way beyond the 2D scaling" as part 

[Read more]

Qualcomm Calls for Monolithic 3D IC | EE Times

dated 7th Jul

"Qualcomm is looking to monolithic 3D and smart circuit architectures to make up for the loss of traditional 2D process scaling as wafer costs for advanced nodes continue to increase." Speaking in a keynote at DAC 2014 in 

[Read more]

Going Up! Monolithic 3D As An Alternative to CMOS Scaling | ASN's

dated 7th Jul

Monolithic 3D (M3D), which takes a very different approach to stacking transistors on top of each other, is one of the most promising alternatives approaches when going 3D. M3D aims at increasing transistor density 

[Read more]

28 nm - The Last Node of Moore's Law - Monolithic 3D Inc., the Next

dated 7th Jul

We can still make transistors smaller but not cheaper. Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Mr. Or-Bach discusses about the fact that Moore's Law at 28nm

[Read more]

“Atoms Don't Scale”=> What is Beyond 7nm (2019)? MonolithIC 3D

dated 7th Jul

We really enjoyed talking with you about all the exciting possibilities for new products and processes that are enabled by monolithic 3D IC. Here is Zvi 'guarding' the poster: Semicon West 2013 Poster. Figure 1 - Zvi Or-Bach at 

[Read more]

The next generation technology driver - monolithic 3D

dated 7th Jul

Monolithic 3D moving forward for SoC and logic devices. The latest news in the semiconductor industry reveals an important strategic relationship between Qualcomm Technologies and Semiconductor Manufacturing International Corporation SMIC. The latest is one of the leading semiconductor foundries in the world and the largest and most advanced foundry in mainland China. "SMIC is further strengthening its strategic relationship with Qualcomm Techn [...]

[Read more]

Qualcomm: Scaling down is not cost-economic anymore - so we are looking at true monolithic 3D

dated 7th Jul

[...]

[Read more]

Samsung Launching Branded SSD with 3D V-NAND

dated 7th Jul

It's the world's first SSD with 3D V-NAND technology

[Read more]

The next generation technology driver - monolithic 3D

dated 6th Jul

Monolithic 3D moving forward for SoC and logic devices. The latest news in the semiconductor industry reveals an important strategic relationship between Qualcomm Technologies and Semiconductor Manufacturing International Corporation SMIC

[Read more]

Qualcomm calls for monolithic 3D IC

dated 21st Jun

"Qualcomm is looking to monolithic 3D and smart circuit architectures to make up for the loss of traditional 2D process scaling as wafer costs for advanced nodes continue to increase." Speaking in a keynote at DAC 2014 in San Francisco, vice president of engineering Karim Arabi, is reported to argue that 3D and EDA need to make up for Moore’s Law

[Read more]

Scaling makes monolithic 3D IC practical - Monolithic 3D Inc., the

dated 8th Jun

... monolithic 3D IC practical. 10/22/2013. 0 Comments. Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi's blog post is about the scaling process that makes monolithic 3D IC practical

[Read more]

Apple iPhone 5's A6 processor to feature TSMC's 3D IC technology

dated 8th Jun

Intel's 3D transistor technology, or Tri-Gate, is expected in 22nm Ivy Bridge processors that are scheduled to arrive by the end of 2011. TSMC's 3D IC design, the one Apple is reportedly using on the A6 processor, is also said 

[Read more]

Going Up! Monolithic 3D As An Alternative to CMOS Scaling | ASN's

dated 8th Jun

Monolithic 3D (M3D), which takes a very different approach to stacking transistors on top of each other, is one of the most promising alternatives approaches when going 3D. M3D aims at increasing transistor density 

[Read more]

28 nm - The Last Node of Moore's Law - Monolithic 3D Inc., the Next

dated 8th Jun

We can still make transistors smaller but not cheaper. Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Mr. Or-Bach discusses about the fact that Moore's Law at 28nm

[Read more]

Scaling makes monolithic 3D IC practical - Monolithic 3D Inc., the

dated 8th Jun

... monolithic 3D IC practical. 10/22/2013. 0 Comments. Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi's blog post is about the scaling process that makes monolithic 3D IC practical

[Read more]

“Atoms Don't Scale”=> What is Beyond 7nm (2019)? MonolithIC 3D

dated 8th Jun

We really enjoyed talking with you about all the exciting possibilities for new products and processes that are enabled by monolithic 3D IC. Here is Zvi 'guarding' the poster: Semicon West 2013 Poster. Figure 1 - Zvi Or-Bach at 

[Read more]

MonolithIC 3D Inc. at ITHERM 2014

dated 8th Jun

MonolithIC 3D Inc. has been honored to be invited to give a Key Note at the ITHERM 2014 with a Plenary Talk. Sponsored by the IEEE’s CPMT Society, ITherm 2014 is an international conference for scientific and engineering exploration of thermal, thermomechanical and emerging technology issues associated with electronic devices, packages and systems. THe ITHerm 2014 was an exciting conference with more than 400 attendies.The company's President [...]

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Samsung begins mass production of 32-layer 3D V-NAND memory

dated 8th Jun

Samsung Electronics on Thursday said it had begun mass production of its second-generation three-dimensional (3D) V-NAND flash memory. The new memory is projected to be more cost-efficient that the previous-gen 3D 

[Read more]

Challenges in 3D NAND Flash Processing | Coventor

dated 8th Jun

With 2D planar NAND flash hitting scaling issues at sub-20nm technology nodes, 3D NAND flash has become all the rage. Instead of restricting memory cells to a

[Read more]

Samsung Ramps Up 3D NAND Fab in China | EE Times

dated 8th Jun

TORONTO — Samsung's memory fab line in China has kicked into gear with full-scale manufacturing of its 3D V-NAND flash memory chips, while Toshiba has forged plans with SanDisk for a new joint facility in Japan

[Read more]

3D NAND Race is On - Semiconductor Experts, Witnesses

dated 8th Jun

Since Samsung announced their development of 3D NAND on August 2013 Samsung 3D Stacked NAND Flash has Engineering Samples . The other flash manufacturers have been trying to catch up while transitioning from 

[Read more]

Toshiba demolishes factory to build new one for 3D NAND | Myce.com

dated 8th Jun

The new manufacturing facility is a joint investment of Toshiba and Sandisk and the the primary purpose of the new wafer fab is to secure space for converting existing Toshiba and SanDisk 2D NAND capacity to 3D NAND 

[Read more]

Toshiba, SanDisk Announce Plans for 3D NAND Fab | Custom PC

dated 8th Jun

According to a recent joint press release, Toshiba and SanDisk has recently announced plans to build a new fab to replace Fab 2 in Yokkaichi Japan to help the companies' transition to 3D NAND technology. Toshiba/SanDisk 

[Read more]

Mass Production Underway For 32-Layer 3D V-NAND Flash

dated 8th Jun

Samsung Electronics has begun mass production for its second-generation, three-dimensional (3D) V-NAND flash memory, which uses 32 vertically stacked cell layers. Coupled with this announcement is the launch of 

[Read more]

Toshiba and SanDisk partner on new fab for 3D NAND - The Tech

dated 19th May

Toshiba's Fab 2 facility in Mie prefecture, Japan, is being torn down to make way for a plant geared toward 3D NAND production. Demolition of the old fab will begin this month, and construction of the replacement is scheduled 

[Read more]

Toshiba to build a new fab to produce 3D NAND flash memory

dated 19th May

Toshiba Corp. on Wednesday said it would demolish one of its fabs in Yokkaichi, the company's NAND Flash memory manufacturing complex in Mie prefecture, Japan, and build an all new factory specially to produce 3D 

[Read more]

Toshiba and SanDisk to start producing 3D NAND flash memory in

dated 19th May

NAND memory chips are used in smart-phones, cameras and other mobile devices to store music, pictures and other data. The new and advanced 3D NAND technology can store 16 times more than any other existing 

[Read more]

3D NAND Transition: 15nm Process Technology Takes Shape | EE

dated 19th May

SanDisk and Toshiba are both continuing to push floating gates until 3D NAND makes economic sense with 15nm process technology that will be applied to wide range of market segments

[Read more]

Samsung begins to mass produce 3D V-NAND flash in China | KitGuru

dated 19th May

The new facility will produce Samsung's advanced NAND flash memory chips, such as 3D V-NAND. Vertical NAND (V-NAND) memory stacks memory cells vertically and uses a charge trap flash architecture. The vertical 

[Read more]

Emergence of 3D NAND a Boon to the Struggling Global ... - PRLog

dated 12th May

Emergence of 3D NAND a Boon to the Struggling Global NAND Flash Memory Market. The Global NAND Market has met with some serious challenges, but innovations like 3D NAND will keep the market afloat for the 

[Read more]

Vertical Channel 3D NAND – An Optical Illusion? | CBRAM/ReRAM

dated 12th May

from Andy Walker, Founder and President of Schiltron Corporation. The concepts of 3D NAND and V-NAND have received so much publicity since last August that no-one should be faulted for thinking that we are on the verge 

[Read more]

Comparing Samsung V-NAND to Micron 16nm Planar NAND | The

dated 12th May

I was recently directed to a very interesting blog post written by 3D technologist Andrew Walker of Schiltron in which he compares two NAND flash chips that were presented at the IEEE International Solid State Circuits 

[Read more]

Samsung's 128Gb 3D NAND Endures 35,000 Cycles as Enterprise

dated 12th May

Samsung's 128Gb 3D NAND Endures 35000 Cycles as Enterprise SSD --- Tech-On! is a one-stop online technology news portal published in English, Japanese, and Chinese, and is run by Nikkei Business Publications, Inc

[Read more]

Micron Technology: Impressive Performance Continues (MU

dated 12th May

The innovation in NAND flash and growth potential in 3D NAND flash has urged Micron to transit from planar NAND flash to 3D NAND flash with volume production targeted for fiscal year 2015. 3D NAND is expected to 

[Read more]

Samsung Starts Mass Producing Industry's First 3D Vertical NAND

dated 12th May

Samsung Electronics, the world leader in advanced memory technology, today announced that it has begun mass producing the industry's first three-dimensional (3D) Vertical NAND (V-NAND) flash memory, which breaks 

[Read more]

Samsung's Xian , China 300mm wafer fabrication facility comes on

dated 12th May

(iTers News) - Samsung Electronics' Xian, China 300mm wafer fabrication facility comes on line today, starting to roll out 3D V- NAND flash memory chips in high volumes. The Xian, China fabrication facility marks global 

[Read more]

IBM demonstrates next-gen phase-change memory that's up to 275

dated 12th May

While it left open the door to revisiting the memory tech at some point in the future, it indicated that the superior scaling of 3D NAND was a better option (despite the numerous problems identified with that technology in the 

[Read more]

Samsung's Xian , China 300mm wafer fabrication facility comes on

dated 12th May

(iTers News) - Samsung Electronics' Xian, China 300mm wafer fabrication facility comes on line today, starting to roll out 3D V- NAND flash memory chips in high volumes. The Xian, China fabrication facility marks ... Keys to the 3D vertical cell- stacking chip processing technology are Samsung's two homegrown indigenous technology breakthroughs – 3D CTF, or charge trap flash technology and vertical interconnect technology. In the conventional planar NAND flash 

[Read more]

ReRAM at SPIE | CBRAM/ReRAM ForumCBRAM/ReRAM Forum

dated 12th May

He pointed out that vertical ReRAM provides a scaling advantage over vertical (3D) NAND architectures for a couple of reasons. In vertical NAND the (vertical) bit lines must be silicon as it forms the channel of the storage 

[Read more]

FPGA as ASIC Alternative: Past and Future - Monolithic 3D Inc., the

dated 12th May

It invented and developed a practical path to the monolithic 3D Integrated Circuit, which includes multiple derivatives for Logic, Memory and Electro Optic devices. MonolithIC 3D Inc. , the Next-Generation 3D-IC Company

[Read more]

28 nm - The Last Node of Moore's Law - Monolithic 3D Inc., the Next

dated 12th May

It invented and developed a practical path to the monolithic 3D Integrated Circuit, which includes multiple derivatives for Logic, Memory and Electro Optic devices. MonolithIC 3D Inc. , the Next-Generation 3D-IC Company

[Read more]

FPGA as ASIC Alternative: Past and Future - Monolithic 3D Inc., the

dated 12th May

MonolithIC 3D Inc. is an IP company with operations in Silicon Valley, Romania and Israel. It invented and developed a practical path to the monolithic 3D Integrated Circuit, which includes multiple derivatives for Logic, 

[Read more]

Going Up! Monolithic 3D As An Alternative to CMOS Scaling | ASN's

dated 12th May

Monolithic 3D (M3D), which takes a very different approach to stacking transistors on top of each other, is one of the most promising alternatives approaches when going 3D. M3D aims at increasing transistor density 

[Read more]

28 nm - The Last Node of Moore's Law - Monolithic 3D Inc., the Next

dated 12th May

We can still make transistors smaller but not cheaper. Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Mr. Or-Bach discusses about the fact that Moore's Law at 28nm

[Read more]

Moore's Law Has Stopped at 28nm! - Monolithic 3D Inc., the Next

dated 12th May

Moore's Law Has Stopped at 28nm! 03/07/2014. 0 Comments. Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Mr. Or-Bach discusses about the fact that Moore's Law Has Stopped at 28nm

[Read more]

Why 450mm will be pushed-back even further - Monolithic 3D Inc

dated 12th May

Instead of the expected 4X density improvement for a large memory block with two nodes of scaling, the improvement range is only 1.6X for low performance to 1.1X at good performance. Since eSRAM dominates most SoC 

[Read more]

Samsung's Xian , China 300mm wafer fabrication facility comes on

dated 12th May

(iTers News) - Samsung Electronics' Xian, China 300mm wafer fabrication facility comes on line today, starting to roll out 3D V- NAND flash memory chips in high volumes. The Xian, China fabrication facility marks global 

[Read more]

New Report on Cost and Investment Implications of 3D NAND

dated 12th May

Research and Markets has announced the addition of the "Cost and Investment Implications of 3D NAND" report to their offering

[Read more]

Samsung Has Started 3D V-NAND Production In Chinese Facility

dated 12th May

Samsung Electronics has started operating its 3D V-NAND memory fabrication line in Xi'an China in full-scale. Construction of the new manufacturing facility took 20 months since Samsung broke ground here in September, 

[Read more]

IBM demonstrates next-gen phase-change memory that's up to 275

dated 12th May

While it left open the door to revisiting the memory tech at some point in the future, it indicated that the superior scaling of 3D NAND was a better option (despite the numerous problems identified with that technology in the 

[Read more]

3D NAND and TSV Process - Semiconductor Experts, Witnesses

dated 12th May

The article below discusses the development of 3D NAND flash memory. The explanation of the difficulty of creating these 3D structures uses the term Through Silicon Via (TSV) to explain how to connect vertically between 

[Read more]

28nm - The Last Node of Moore's Law | EE Times

dated 7th Apr

Please mark your calendar for this opportunity to contribute to and learn about SOI and monolithic 3D technology, as these technologies are well positioned to maintain the semiconductor industry's momentum into the future

[Read more]

MonolithIC 3D Inc. at 2013 S3S Conference - Monolithic 3D Inc., the

dated 7th Apr

Join MonolithIC 3D Inc. at the IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference on October 7th thru 10th, 2013 in Monterey, CA. The conference will start with three plenary talks, one for each of the 

[Read more]

"Moore's Law Dead by 2022" - Then, Before or - Monolithic 3D Inc

dated 7th Apr

... by 2022" - Then, Before or .... ? 09/03/2013. 1 Comment. Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi discusses the EE Times blog piece: Moore's Law Dead by 2022, Expert Says

[Read more]

Micron FYQ2 Beats; DRAM, NAND Conditions Stable; 3-D NAND

dated 7th Apr

Shares of NAND flash memory and DRAM memory chip maker Micron Technology (MU) are up 35 cents, or 1.5%, at $24.35, in late trading after the company this afternoon reported fiscal Q2 revenue and earnings per share that ... be in a similar range but we could see a reduction in the growth rate beyond 2015 as 3D production becomes more predominant and there's a subsequent reduction in wafer output given the additional cleaning space required for 3D NAND

[Read more]

Vertical Channel 3D NAND – An Optical Illusion? | CBRAM/RRAM

dated 7th Apr

from Andy Walker, Founder and President of Schiltron Corporation. The concepts of 3D NAND and V-NAND have received so much publicity since last August that no-one should be faulted for thinking that we are on the verge 

[Read more]

Samsung's 128Gb 3D NAND Endures 35,000 Cycles as Enterprise

dated 7th Apr

Samsung's 128Gb 3D NAND Endures 35000 Cycles as Enterprise SSD --- Tech-On! is a one-stop online technology news portal published in English, Japanese, and Chinese, and is run by Nikkei Business Publications, Inc

[Read more]

3D-NAND development to accelerate – 20% of the market by 2015

dated 7th Apr

Smaller NAND however is more difficult to manufacturer which is the reason for NAND manufacturers to accelerate development of 3D-NAND Flash. Samsung was the first to make 3D NAND commercially available in August 

[Read more]

DRAMeXchange - 【Market View】TrendForce: 3D-NAND Flash

dated 7th Apr

TrendForce: 3D-NAND Flash “Arms Race” to Officially Begin in 2014, Supply Proportion to Grow to 20% in 2015. The growth of Smartphones, tablets, and SSDs helped boost NAND Flash demand to 46% in 2013, according to 

[Read more]

3D NAND's Impact on the Equipment Market | The Memory Guy

dated 7th Apr

A very unusual side effect of the move to 3D NAND will be the impact on the equipment market. 3D NAND takes the pressure off of lithographic steps and focuses more attention on deposition and etch. The reason for going to 

[Read more]

3D NAND Is a Reality – What's Next? | The Applied Materials Blog

dated 7th Apr

One of the biggest developments taking place in the semiconductor industry is the emergence of 3D NAND memory technology. Products are available today that feature 3D NAND devices. It has taken years to become a 

[Read more]

StorageNewsletter » NAND Flash Brand Supplier Revenue Falls 4.5

dated 7th Apr

Samsung's new fab in Xian, beginning operations this quarter, will serve as the base for 3D NAND flash production. As cloud computing stimulates enterprise SSD demand growth, in 2014 Samsung plans to switch its strategic 

[Read more]

3D-NAND development to accelerate – 20% of the market by 2015

dated 7th Apr

NAND flash memory demand was 46% up in 2013 thanks to the increasing popularity of smartphones, tablets and SSDs

[Read more]

3D NAND's Impact on the Equipment Market | The Memory Guy

dated 7th Apr

A very unusual side effect of the move to 3D NAND will be the impact on the equipment market. 3D NAND takes the pressure off of lithographic steps and focuses more attention on deposition and etch. The reason for going to 

[Read more]

Flash Memory Summit: What's Driving 3D NAND Flash, What

dated 7th Apr

The best combination of cost, power and performance will be found in 3D NAND architectures, according to panelists at a plenary session at the Flash Memory Summit August 13, 2013. But as their lively presentations showed 

[Read more]

Samsung Mass Producing 3D Vertical NAND Flash - Tom's Hardware

dated 7th Apr

Samsung Electronics said on Monday that it is now mass producing the industry's first 3D Vertical NAND (V-NAND) flash memory, offering a 128 gigabit (Gb) density in a single chip. According to Samsung, V-NAND breaks 

[Read more]

Samsung ships first 3D vertical NAND flash, defies memory scaling

dated 7th Apr

The main challenge in producing higher-capacity flash storage is one of scale -- as density goes up, so does cell interference and the chances of a breakdown. Samsung may have overcome that barrier (if temporarily) by 

[Read more]

Researchers Devise 4-D Memory | The Memory Guy

dated 7th Apr

Only months after Samsung's announcement of 3D memory production a new 4-dimensional memory has been prototyped by university researchers. This memory not only has bits in the X and Y dimensions, like planar NAND 

[Read more]

Intel And Non-Volatile Memory - Seeking Alpha

dated 7th Apr

There is a lot of discussion about 3D NAND lately. This is a decent discussion on the subject. The important thing about 3D NAND memory will be the ability and technology for deposition and etching high aspect ratio 

[Read more]

Samsung To Start 3D V-NAND Production In New China-based

dated 7th Apr

Samsung's three-dimensional (3D) Vertical NAND (V-NAND) flash memory will be used for a wide range of consumer electronics and enterprise applications, including embedded NAND storage and solid state drives (SSDs)

[Read more]

Vertical Channel 3D NAND – An Optical Illusion? | CBRAM/RRAM

dated 7th Apr

from Andy Walker, Founder and President of Schiltron Corporation. The concepts of 3D NAND and V-NAND have received so much publicity since last August that no-one should be faulted for thinking that we are on the verge 

[Read more]

Samsung's 128Gb 3D NAND Endures 35,000 Cycles as Enterprise

dated 7th Apr

Samsung Electronics Co Ltd made an announcement about its "Vertical NAND (V-NAND)" 3D NAND flash memory at International Solid-State Circuits Conference (ISSCC) 2014 (lecture number: 19.5). The conference took 

[Read more]

Semiconductor Engineering .:. 3D NAND Is A Reality – What's Next?

dated 7th Apr

Significant technical advances are required to successfully manufacture vertical NAND designs. One of the biggest developments taking place in the semiconductor industry is the emergence of 3D NAND memory technology

[Read more]

Secher Nbiw: Momentum Builds for Monolithic 3D ICs | EE Times

dated 7th Apr

Momentum Builds for Monolithic 3D ICs | EE Times. [+ Neil] The door has started to open for alternative technologies that might help to maintain the IC industry's overall momentum, and monolithic 3D ICs seem well positioned 

[Read more]

28nm - The Last Node of Moore's Law | EE Times

dated 7th Apr

Please mark your calendar for this opportunity to contribute to and learn about SOI and monolithic 3D technology, as these technologies are well positioned to maintain the semiconductor industry's momentum into the future

[Read more]

"Moore's Law Dead by 2022" - Then, Before or - Monolithic 3D Inc

dated 7th Apr

... by 2022" - Then, Before or .... ? 09/03/2013. 1 Comment. Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi discusses the EE Times blog piece: Moore's Law Dead by 2022, Expert Says

[Read more]

Vertical Channel 3D NAND – An Optical Illusion? | CBRAM/RRAM

dated 7th Apr

from Andy Walker, Founder and President of Schiltron Corporation. The concepts of 3D NAND and V-NAND have received so much publicity since last August that no-one should be faulted for thinking that we are on the verge 

[Read more]

Samsung's 128Gb 3D NAND Endures 35,000 Cycles as Enterprise

dated 7th Apr

Samsung's 128Gb 3D NAND Endures 35000 Cycles as Enterprise SSD --- Tech-On! is a one-stop online technology news portal published in English, Japanese, and Chinese, and is run by Nikkei Business Publications, Inc

[Read more]

Semiconductor Engineering .:. 3D NAND Is A Reality – What's Next?

dated 7th Apr

Significant technical advances are required to successfully manufacture vertical NAND designs. One of the biggest developments taking place in the semiconductor industry is the emergence of 3D NAND memory technology

[Read more]

Heat Problems Grow With FinFETs, 3D-ICs - Semiconductor

dated 26th Mar

Heat Problems Grow With FinFETs And 3D-ICs. Electromigration, questions about which problems to fix first are raising red flags in leading-edge designs

[Read more]

The Most Expensive SRAM in the World - 2.0 - Monolithic 3D Inc

dated 26th Mar

Embedded SRAM Scaling is Broken and with it Moore's Law. Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. and and Ben Louie, Zeno Semiconductor

[Read more]

Paradigm Shift - Semi Equipment Tells the Future - Monolithic 3D Inc

dated 26th Mar

... Tells the Future. 01/29/2014. 0 Comments. Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Mr. Or-Bach discusses about the new trend in semiconductors for equipment spending

[Read more]

Intel vs. TSMC: an Update - Monolithic 3D Inc., the Next Generation

dated 26th Mar

We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Mr. Or-Bach discusses about the latest news in semiconductor industry, the headlines that dominated last week's news papers 

[Read more]

Why SOI is the Future Technology of Semiconductors - Monolithic

dated 26th Mar

B. SOI is the natural technology for monolithic 3D IC for all overlaying transistor layers, and monolithic 3D is the most effective path to keep Moore's Law C. SOI, or better 'XOI', is the most efficient path for most of the new 

[Read more]

Merry Christmas and Happy New Year! - Monolithic 3D Inc., the Next

dated 26th Mar

Happy Holidays! Looking back at the past year we are thankful to see now that momentum building for monolithic 3D ICs. As stated in our company's latest blog post, in retrospective we can say thanks and looking forward to 

[Read more]

Are We Using Moore's Name in Vain? - Monolithic 3D Inc., the Next

dated 26th Mar

MonolithIC 3D Inc. is an IP company with operations in Silicon Valley, Romania and Israel. It invented and developed a practical path to the monolithic 3D Integrated Circuit, which includes multiple derivatives for Logic, 

[Read more]

"Moore's Law Dead by 2022" - Then, Before or - Monolithic 3D Inc

dated 26th Mar

... by 2022" - Then, Before or .... ? 09/03/2013. 1 Comment. Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi discusses the EE Times blog piece: Moore's Law Dead by 2022, Expert Says

[Read more]

More Momentum Builds for Monolithic 3D ICs

dated 26th Mar

[...]

[Read more]

Samsung Xian NAND flash plant begins commercial runs - DigiTimes

dated 26th Mar

But some sources pointed out that the initial production of the Xian plant will be limited due to sluggishness in the NANA flash market, adding that a relatively low yield rate of the plant's 3D NAND devices will also prohibit 

[Read more]

Global 3D NAND Flash Memory Market Size, Key Players, Region

dated 26th Mar

This new market research report on 3D NAND Flash Memory provides comprehensive market data, including market size and forecast by 3D NAND Flash Memory application and products on a regional basis from 2012 to 

[Read more]

Vertical Channel 3D NAND – An Optical Illusion? | CBRAM/RRAM

dated 26th Mar

from Andy Walker, Founder and President of Schiltron Corporation. The concepts of 3D NAND and V-NAND have received so much publicity since last August that no-one should be faulted for thinking that we are on the verge 

[Read more]

Samsung's 128Gb 3D NAND Endures 35,000 Cycles as Enterprise

dated 26th Mar

Samsung's 128Gb 3D NAND Endures 35000 Cycles as Enterprise SSD --- Tech-On! is a one-stop online technology news portal published in English, Japanese, and Chinese, and is run by Nikkei Business Publications, Inc

[Read more]

Experts At The Table: Commercial potential and production

dated 26th Mar

In this roundtable discussion focused on 3D NAND , we hear from Samsung Electronics (SE) in South Korea, Bradley Howard, Vice President of Advanced Technology Group, Etch Business Unit, at Applied Materials and Jim 

[Read more]

3D NAND: To 10nm and beyond | Semiconductor Manufacturing

dated 26th Mar

The transition to 3D NAND is inevitable, but there is still plenty to be squeezed from 2D NAND technology. An Applied Materials-sponsored panel at IEDM discussed where the industry is today and where it's headed

[Read more]

Semiconductor Engineering .:. The Bumpy Road To 3D NAND

dated 26th Mar

The Bumpy Road To 3D NAND And even after the technology becomes mainstream, there are questions about how long it how well it will scale

[Read more]

3D-NAND development to accelerate – 20% of the market by 2015

dated 26th Mar

Smaller NAND however is more difficult to manufacturer which is the reason for NAND manufacturers to accelerate development of 3D-NAND Flash. Samsung was the first to make 3D NAND commercially available in August 

[Read more]

3D NAND's Impact on the Equipment Market | The Memory Guy

dated 26th Mar

A very unusual side effect of the move to 3D NAND will be the impact on the equipment market. 3D NAND takes the pressure off of lithographic steps and focuses more attention on deposition and etch. The reason for going to 

[Read more]

3D NAND Is a Reality – What's Next? | The Applied Materials Blog

dated 26th Mar

One of the biggest developments taking place in the semiconductor industry is the emergence of 3D NAND memory technology. Products are available today that feature 3D NAND devices. It has taken years to become a 

[Read more]

3D NAND Chips Are Going to Make High-Capacity SSDs a Reality

dated 26th Mar

SSDs are wonderful things that massively speed up your computer and they're getting cheaper too. But currently they don't offer the capacity that some users demand. Fortunately, that could all be about to change

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Samsung, Intel, TSMC to account for 52% of semiconductor capex in

dated 26th Mar

The company stated that this large increase is needed to expand production of advanced 3D NAND flash memory with its manufacturing partner Toshiba. While SanDisk's capital spending level is expected to be much higher 

[Read more]

Samsung Xian NAND flash plant begins commercial runs - DigiTimes

dated 26th Mar

But some sources pointed out that the initial production of the Xian plant will be limited due to sluggishness in the NANA flash market, adding that a relatively low yield rate of the plant's 3D NAND devices will also prohibit 

[Read more]

Sandisk and 3D NAND Flash | cheapchipsmemory

dated 26th Mar

In an article posted in Motley Fool, the company is starting to slowly shift in 3D NAND but still trust the traditional 2D NAND. The global leader in memory peripherals is a known provider of 2D NAND solutions.We all…

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StorageNewsletter » NAND Flash Brand Supplier Revenue Falls 4.5

dated 26th Mar

Samsung's new fab in Xian, beginning operations this quarter, will serve as the base for 3D NAND flash production. As cloud computing stimulates enterprise SSD demand growth, in 2014 Samsung plans to switch its strategic 

[Read more]

Samsung starts churning out 3D vertical NAND - Smaller, faster

dated 26th Mar

Samsung is about to start producing 3D vertical NAND (V-NAND) flash chips, allowing for higher densities and more performance in a small package.The layers can be stacked vertically and Samsung says it can cram up to 

[Read more]

28 nm - The Last Node of Moore's Law

dated 18th Mar

We have been hearing about the imminent demise of Moore’s Law quite often recently. Most of those predictions have been targeting the 7nm node and 2020 as the end point. But we need to recognize that 28nm is actually the last node of Moore's Law, beyond which we can make smaller transistors and pack more of them into the same die size but we can not reduce the cost, and in most cases, the same SoC will have a higher cost!

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Moore's Law Has Stopped at 28nm!

dated 7th Mar

While many have recently predicted the imminent demise of Moore’s Law, we need to recognize that this actually has happened at 28nm. From this point on we will still be able to double the amount of transistors in a single device but not at lower cost. And, for most applications, the cost will actually go up

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Why 450mm will be pushed-back even further

dated 6th Mar

The chart below was presented at ISSCC 2014 by Dinesh Maheshwari, CTO of Memory Products Division at Cypress Semiconductors. The slide clearly illustrates that embedded SRAM ("eSRAM") scaling is broken.

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The Rise of the Monolithic 3-D Chip - IEEE Spectrum

dated 24th Feb

Monolithic 3D. Image: CEA-Leti Two-story Circuit: Multistory circuits could let chipmakers increase the density of devices on a chip without having to shrink transistors. Ever since the integrated circuit made its debut, 

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Semiconductor Engineering .:. Manufacturing Bits: Feb. 11

dated 24th Feb

Monolithic 3D SRAM project. A group of companies have started a research project to propel the development of monolithic 3D chip technology. The research project, called COMPOSE³, involves the ability to stack transistors 

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Paradigm shift: Semi equipment tells the future | Solid State

dated 24th Feb

It should be noted that monolithic 3D technology for logic is far behind in comparison to memory. Given that the current issues with dimensional scaling are clearly only going to get worse, we should hope that an acceleration 

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Are We Using Moore's Name in Vain? - Monolithic 3D Inc., the Next

dated 24th Feb

MonolithIC 3D Inc. is an IP company with operations in Silicon Valley, Romania and Israel. It invented and developed a practical path to the monolithic 3D Integrated Circuit, which includes multiple derivatives for Logic, 

[Read more]

"Moore's Law Dead by 2022" - Then, Before or - MonolithIC 3D

dated 24th Feb

... by 2022" - Then, Before or .... ? 09/03/2013. 1 Comment. Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi discusses the EE Times blog piece: Moore's Law Dead by 2022, Expert Says

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“Atoms Don't Scale”=> What is Beyond 7nm (2019)? MonolithIC 3D

dated 24th Feb

We really enjoyed talking with you about all the exciting possibilities for new products and processes that are enabled by monolithic 3D IC. Here is Zvi 'guarding' the poster: Semicon West 2013 Poster. Figure 1 - Zvi Or-Bach at 

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Monolithic 3D Ion Array for Quantum Information Processing

dated 24th Feb

Researchers in NPL's Quantum Detection Group have demonstrated for the first time a monolithic 3D ion microtrap array which could be scaled up to handle several tens of ion-based quantum bits (qubits). The research, shows how it is 

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The Most Expensive SRAM in the World - 2.0

dated 24th Feb

Embedded SRAM Scaling is Broken and with it Moore's Law [...]

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The Most Expensive SRAM in the World - 2.0

dated 20th Feb

ISSCC 2014 illuminates the impeding problem - embedded SRAM scaling. The following two slides are taken from the Dinesh Maheshwari, CTO, Memory Products Division at Cypress Semiconductors, presentation. The first slide clearly illustrates that embedded SRAM scaling is broken. Instead of 4X density improvement for a large memory block for two nodes scaling the improvement range is only 1.6X for low performance to 1.1X at good performance

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Momentum Builds for Monolithic 3D ICs | EE Times

dated 14th Jan

The door has started to open for alternative technologies that might help to maintain the IC industry's overall momentum, and monolithic 3D ICs seem well positioned to do so

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More Momentum Builds for Monolithic 3D ICs - Monolithic 3D Inc

dated 14th Jan

Following last year IEDM 2012 we wrote a blog - IEDM 2012 - The Pivotal Point for Monolithic 3D IC (a good primer still well worth reading) and now, a year later, we read that Momentum Builds For Monolithic 3D ICs

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Why SOI is the Future Technology of Semiconductors

dated 14th Jan

Zvi Or-Bach, President and CEO of MonolithIC 3D, blogs that this is the one learning we can take away from IEDM 2013

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3D Stacks & Security Key for IBM in Server Market | EE Times

dated 14th Jan

Clearly the number one advantage of all 3D NAND which are now reaching mass production is cost reduction !, similarly CEA Letri announcment of their agreement with Qualcomm for the development of monolithic 3D states 

[Read more]

Momentum Builds for Monolithic 3D ICs | EE Times

dated 14th Jan

The door has started to open for alternative technologies that might help to maintain the IC industry's overall momentum, and monolithic 3D ICs seem well positioned to do so

[Read more]

Can Intel Beat TSMC? - Monolithic 3D Inc., the Next Generation 3D

dated 14th Jan

MonolithIC 3D Inc. is an IP company with operations in Silicon Valley, Romania and Israel. It invented and developed a practical path to the monolithic 3D Integrated Circuit, which includes multiple derivatives for Logic, 

[Read more]

Are We Using Moore's Name in Vain? - Monolithic 3D Inc., the Next

dated 14th Jan

MonolithIC 3D Inc. is an IP company with operations in Silicon Valley, Romania and Israel. It invented and developed a practical path to the monolithic 3D Integrated Circuit, which includes multiple derivatives for Logic, 

[Read more]

3D-IC: Two for one - Monolithic 3D Inc., the Next Generation 3D-IC

dated 14th Jan

We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi details MonolithIC 3D Inc's participation at the upcoming events in 3D IC field and the key role of the company in each event

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MonolithIC 3D Inc. at IEEE International Conference on 3D System

dated 14th Jan

Join MonolithIC 3D Inc. at IEEE International Conference on 3D System Integration (3D IC) on October 2nd -4th, 2013 in San Francisco, CA. Zvi Or-Bach, President and CEO of MonolithIC 3D Inc. will present a guest tutorial on 

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"Moore's Law Dead by 2022" - Then, Before or - MonolithIC 3D Inc

dated 14th Jan

... by 2022" - Then, Before or .... ? 09/03/2013. 1 Comment. Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi discusses the EE Times blog piece: Moore's Law Dead by 2022, Expert Says

[Read more]

“Atoms Don't Scale”=> What is Beyond 7nm (2019)? MonolithIC 3D

dated 14th Jan

07/23/2013. 0 Comments. Picture. We have a guest contribution today from Brian Cronquist, MonolithIC 3D Inc.'s VP of Technology & IP. Brian discusses about MonolithIC 3D Inc.'s participation at Semicon West 2013

[Read more]

Why SOI is the Future Technology of Semiconductors

dated 14th Jan

One Learning we can take away from IEDM 2013 [...]

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Why SOI is the Future Technology of Semiconductor

dated 14th Jan

No doubt that FDSOI generate high interest these days and I found a very interesting contribution from Zvi Or-Bach, President and CEO of MonolithIC 3D, Inc. Zvi has accepted to share his wrap-up from IEDM, in a blog for Semiwiki readers. If you remember the long discussion we had in Semiwiki about cost comparison, some comments were posted by people deploring that the source of the cost related data was unique. Thanks to Zvi, we have now multiple sources, from GlobalFoundries to IBS, addressing cost comparison at technology level, wafer level and finally 20nm die cost comparison at 100 mm2 and 200 mm2

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Samueli Sees Life After Moore's Law | EE Times

dated 16th Dec

... least slowing down the trend. They include new backend materials and processes, multiple 3D chip stacking efforts, and industry collaboration on extreme ultraviolet lithography, 450mm wafers, and design optimizations of all sorts, Yeap wrote . Email This .... Yes, it is clear thar cost per transistor is not going down with dimension scaling, but new type of scaling - monolithic 3D - would keep Moore's Law in the near future. Samsung is already doing so with 3D NAND 

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Monolithic 3D is Now in Production: Samsung Starts Mass Producing Industry’s First 3D Vertical NAND Flash

dated 16th Dec

[...]

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3D NAND: Who Will Make It and When? | The Memory Guy

dated 16th Dec

This series has looked at 3D NAND technology in a good deal of technical depth. The last question to be answered centers around the players and the timing of the technology. A lot has been said about the technology and its 

[Read more]

Top Flash Memory Chip Stocks to Buy for 2014 - SanDisk Corp

dated 16th Dec

Source: ThinkstockBack in August, Samsung announced it had begun mass production of its first 3D NAND vertical flash memory chips, a huge leap forward as many consumer products continue to look for the ability to store 

[Read more]

Micron: 3-D NAND Coming, But Will Take Time, Says Piper; Applied

dated 16th Dec

Given the ongoing challenges with the architecture change from 2D NAND (floating gate) to 3D NAND (charge trap flash) it is clear SNDK wants to push 2D NAND beyond 1Z (ramp in 2H14) leveraging its fab capability for 

[Read more]

Mass 3D NAND Production May Not Mean Mass Adoption - Blog

dated 16th Dec

Development and production of 3D NAND is ramping up, but 2014 will clearly be a shakeout year. Samsung Electronics Co. Ltd. announced in August it had begun mass production of a 128 Gbit NAND flash memory that is 

[Read more]

3D NAND Is a Reality – What's Next? | The Applied Materials Blog

dated 16th Dec

One of the biggest developments taking place in the semiconductor industry is the emergence of 3D NAND memory technology. Products are available today that feature 3D NAND devices. It has taken years to become a 

[Read more]

SanDisk driving advanced R&D into 3D NAND and 3D post-NAND

dated 16th Dec

CiOL magazine interviews Ganesh Guruswamy, VP and Head of Design Operations for SanDisk India Design Center, about the global flash memory industry

[Read more]

Monolithic 3D IC Technologies | EE Times

dated 10th Dec

In this installment of our 3D IC mini-series, we ponder the use of esoteric materials and monolithic 3D IC technologies

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Leti Outlines FDSOI And Monolithic 3D IC Roadmaps

dated 10th Dec

Leti Outlines FDSOI And Monolithic 3D IC Roadmaps A look at the new technologies that will be required in future semiconductor scaling, what they are, and where they ultimately may fit in

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“Atoms Don't Scale”=> What is Beyond 7nm (2019)? MonolithIC 3D

dated 10th Dec

07/23/2013. 0 Comments. Picture. We have a guest contribution today from Brian Cronquist, MonolithIC 3D Inc.'s VP of Technology & IP. Brian discusses about MonolithIC 3D Inc.'s participation at Semicon West 2013

[Read more]

ASML at Semicon West 2013: SRAM scaling has Stopped

dated 10th Dec

... and the SRAM Bit-Cell". Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi adds information to his previous blog post: Dimension Scaling and the SRAM Bit-Cell

[Read more]

IEDM 2012 - The Pivotal Point for Monolithic 3D IC - MonolithIC 3D Inc

dated 10th Dec

From our biased point of view we see the recent IEDM12 as a pivotal point for monolithic 3D. Here's why: We start with the EE Times article IEDM goes deep on 3-D circuits, starting with "Continuing on the theme of 3-D circuit 

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I-Micronews - ADVANCED PACKAGING : Overview of Monolithic 3D

dated 10th Dec

Here is an article from Deepak Sekar, Chief Scientist of MonolithIC 3D Inc. He presents innovative approaches developed by Toshiba, Samsung, Hynix and Micron for polysilicon-based monolithic 3D flash memories as well 

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Monolithic 3D is Now in Production: Samsung Starts Mass Producing Industry’s First 3D Vertical NAND Flash

dated 10th Dec

[...]

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Semiconductor industry leaders to examine the future of 3D NAND

dated 10th Dec

Manufacturing 3D NAND designs requires overcoming formidable technical challenges to create extremely complex high-aspect-ratio structures. The resulting reliability, density, performance, and power savings benefits will 

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3D NAND's Impact on the Equipment Market | The Memory Guy

dated 10th Dec

A very unusual side effect of the move to 3D NAND will be the impact on the equipment market. 3D NAND takes the pressure off of lithographic steps and focuses more attention on deposition and etch. The reason for going to 

[Read more]

Applied Innovation » Blog Archive » 3D NAND Is A Reality – What's

dated 10th Dec

By Gill Lee. One of the biggest developments taking place in the semiconductor industry is the emergence of 3D NAND memory technology. Products are available today that feature 3D NAND devices. It has taken years to become a reality 

[Read more]

How Do You Erase and Program 3D NAND? | The Memory Guy

dated 10th Dec

Some of my readers have asked: “How is 3D NAND programmed and erased? Is it any different from planar NAND?” In a word: No. (Before I get too far into this allow me to admit that The Memory Guy doesn't understand 

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3D NAND: Benefits of Charge Traps over Floating Gates | The

dated 10th Dec

A prior post in this series (3D NAND: Making a Vertical String) discussed the difficulties of successfully manufacturing a charge trap flash bit. Still, Spansion, and now other flash makers, have determined to take this route

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3D NAND: How do You Access the Control Gates? | The Memory Guy

dated 10th Dec

One of the thornier problems in making 3D NAND is the job of connecting the peripheral logic (the row decoders) to all of those control gates that are on layers buried somewhere within the bit array. Remember that the control 

[Read more]

SanDisk driving advanced R&D into 3D NAND and 3D post-NAND

dated 10th Dec

CiOL magazine interviews Ganesh Guruswamy, VP and Head of Design Operations for SanDisk India Design Center, about the global flash memory industry

[Read more]

What is a 3D NAND? | The Memory Guy

dated 10th Dec

In the prior post we discussed the need to go vertically into the body of the die, since NAND flash can not be scaled much farther in length and width on the die's surface. Toshiba invented a 3D NAND which has been adopted 

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SNDK, MU: Flash Summit Intrigues with 3D NAND, 'Cold Storage

dated 10th Dec

A number of Street observers last night and this morning were offering up their thoughts on the state of the flash-memory-based storage industry as they trolled the halls at the Flash Memory Summit, which kicked off yesterday 

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CEA-Leti signs agreement with Qualcomm to assess sequential 3D technology

dated 9th Dec

CEA-Leti today announced an agreement with Qualcomm Technologies, Inc., a subsidiary of Qualcomm Incorporated, to assess the feasibility and the value of Leti’s sequential 3D technology. In recent years, Leti has been actively working on a new 3D integration technology process called sequential 3D integration that enables the stacking of active layers of transistors in the third dimension. In comparison with 3D-TSV technologies, advantageously used to stack separate die, sequential 3D technology is anticipated to process all the functions in a single semiconductor manufacturing flow.

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Posts Tagged ‘3D IC’

dated 9th Dec

Posts Tagged ‘3D IC’

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Momentum Builds For Monolithic 3D ICs

dated 14th Nov

The 2.5D/3D chip market is heating up on several fronts. On one front, stacked-die using through-silicon vias (TSVs) is taking root. In a separate area, Samsung is sampling the world’s first 3D NAND device, with Micron and SK Hynix expected to follow suit

[Read more]

An Alternative Kind of Vertical 3D NAND String | The Memory Guy

dated 13th Nov

Samsung's TCAT 3D NAND flash My prior 3D NAND post explained how Toshiba's BiCS cell works, using a silicon nitride charge trap to substitute for a floating gate. This post will look at an alternative technology used by 

[Read more]

SanDisk driving advanced R&D into 3D NAND and 3D post-NAND

dated 13th Nov

CiOL magazine interviews Ganesh Guruswamy, VP and Head of Design Operations for SanDisk India Design Center, about the global flash memory industry

[Read more]

3D NAND: Making a Vertical String | The Memory Guy

dated 13th Nov

Toshiba's Original BiCS Diagram - IEDM 2007 Let's look at how one form of 3D NAND is manufactured. For this post we will explore the original design suggested by Toshiba at the IEEE's International Electron Device Meeting 

[Read more]

What is 3D NAND? Why do we need it? How do ... - The Memory Guy

dated 13th Nov

3D NAND In August 2013 Samsung announced its V-NAND, the first production 3D NAND, kicking off a big change in the way that NAND flash will be manufactured. This new technology raises a number of important 

[Read more]

Are We Using Moore's Name in Vain?

dated 7th Nov

The assertion that Moore made in April 1965 Electronics paper was:"Thus there is a minimum cost at any given time in the evolution of the technology. At present, it is reached when 50 components are used per circuit. But the minimum is rising rapidly while the entire cost curve is falling (see graph below)."

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Scaling makes monolithic 3D IC practical | Solid State Technology

dated 29th Oct

Accordingly the industry developed a 3D IC technology based on TSV (Thru Silicon Via) where each strata (wafer) could be independently processed, then after thinning at least one wafer, place in a 3D configuration, and 

[Read more]

Scaling Makes Monolithic 3D Practical | Semiconductor

dated 29th Oct

By Zvi Or-Bach, President & CEO of MonolithIC 3D Inc. In the 1960s, James Early of Bell Labs proposed three-dimensional structures as a natural evolution for integrated circuits. Since then many attempts have been made to 

[Read more]

“Atoms Don't Scale”=> What is Beyond 7nm (2019

dated 29th Oct

However, another form of 3D IC may become truly interesting – the monolithic 3D IC. In fact, all of the non-volatile memory vendors have already announced monolithic 3D NAND Flash architectures and their plans for 

[Read more]

EUV vs. TSV: Which one will become production ready first

dated 29th Oct

... production ready first? 07/31/2013. 1 Comment. Picture. We have a guest contribution today from Israel Beinglass, the CTO of MonolithIC 3D Inc. Israel debates on the answer to an important question that is on everybody's mind these days

[Read more]

“Atoms Don't Scale”=> What is Beyond 7nm (2019)? MonolithIC 3D

dated 29th Oct

07/23/2013. 0 Comments. Picture. We have a guest contribution today from Brian Cronquist, MonolithIC 3D Inc.'s VP of Technology & IP. Brian discusses about MonolithIC 3D Inc.'s participation at Semicon West 2013

[Read more]

Please Help Me Understand IBM - Common Platform Technology

dated 29th Oct

"Innovations for Next Generation Scaling". Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi discusses The Common Platform Technology Forum 2013

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Monolithic 3D is Now in Production: Samsung Starts Mass Producing Industry’s First 3D Vertical NAND Flash

dated 29th Oct

[...]

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3D NAND and the Flash Memory Summit - SemiWiki

dated 29th Oct

I had an interesting chat with David Eggleston, Principal, Intuitive Cognition Consulting*, about the erecent Flash Memory Summit (FMS) in Santa Clara, CA. Dave organized the couple of 'new technologies' sessions

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What is 3D NAND? Jim Handy launches new series to educate us

dated 29th Oct

Jim Handy launched a new 9-part series aimed to educate the masses on everything 3D NAND

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65 percent of NAND ICs to use 3D process by 2017 | eletimes.com

dated 29th Oct

IHS has recently reported that by 2017, nearly two-thirds—or 65.2 per cent—of all NAND memory chips shipped worldwide will be produced using 3D manufacturing processes, up from less than one per cent this year. The share of the overall 

[Read more]

What is 3D NAND? Why do we need it? How do they make it? | The

dated 29th Oct

3D NAND In August 2013 Samsung announced its V-NAND, the first production 3D NAND, kicking off a big change in the way that NAND flash will be manufactured. This new technology raises a number of important 

[Read more]

Samsung Discloses Details of 'V-NAND' 3D NAND Flash -- Tech-On!

dated 29th Oct

Samsung Discloses Details of 'V-NAND' 3D NAND Flash --- Tech-On! is a one-stop online technology news portal published in English, Japanese, and Chinese, and is run by Nikkei Business Publications, Inc. (NikkeiBP), 

[Read more]

Samsung announces 3D V-NAND flash chips | bit-tech.net

dated 29th Oct

Samsung announces 3D V-NAND flash chips. Stacking to boost performance, capacity

[Read more]

Memory materials revolution highlighted at SMC | Solid State

dated 29th Oct

The revolution is being sparked by immediate challenges in DRAM, NAND, 3D and embedded memory at 20nm, and possible scaling limitation of that NAND and NOR flash memory beyond 20 nm. Beyond that node, the industry is looking at 

[Read more]

Why Do We Need 3D NAND? | The Memory Guy

dated 29th Oct

NAND Flash Capped Gate Structure A memory chip of a certain area costs about the same amount to produce, no matter how many bits it holds. Naturally, the more bits you can cram onto this chip, the cheaper the price per bit 

[Read more]

Scaling makes monolithic 3D IC practical

dated 22nd Oct

In the 1960s, James Early of Bell Labs proposed three-dimensional structures as a natural evolution for integrated circuits. Since then many attempts have been made to develop such a technology. So far, none have been able to overcome the 400°C process temperature limitation imposed by the use of aluminum and copper in modern IC technologies for the underlying interconnects without great compromises. The “Holy Grail” of 3D IC has been the monolithic 3D, also known as sequential 3D, where a second transistor layer could be constructed directly over the base wafer using ultra-thin silicon – less than 100nm – thus enabling a very rich vertical connectivity

[Read more]

MonolithIC 3D Inc. at the 2013 IEEE 3DIC Conference - integrated

dated 21st Oct

MonolithIC 3D Inc. at the 2013 IEEE 3DIC Conference. Published October 5, 2013 | By. Email a friend. MonolithIC 3D Inc. We believe that monolithic 3D is the best way for the semiconductor industry to keep on the path called Moore's' Law 

[Read more]

The Many Flavors of 3D DRAM - 3D InCites

dated 21st Oct

After attending last week's IEEE 3D IC Symposium, I was curious about the differences between Tezzaron's DiRAM, HMC and HBM. Add to that the much-discussed but little-understood monolithic 3D DRAM approach being 

[Read more]

MonolithIC 3D Inc. at the 2013 S3S Conference | Article Marketing

dated 21st Oct

San Jose, CA (PRWEB) October 03, 2013 MonolithIC 3D Inc. the technology innovator of Monolithic 3D announced today that it was honored to give the 3D Plenary

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Monolithic 3D chip fabricated without TSVs | Solid State Technology

dated 21st Oct

They then used a novel low-temperature chemical mechanical planarization (CMP) technique to thin and planarize the silicon, enabling the fabrication of ultrathin, ultraflat devices. The monolithic 3D architecture demonstrated 

[Read more]

“Atoms Don't Scale”=> What is Beyond 7nm (2019

dated 21st Oct

However, another form of 3D IC may become truly interesting – the monolithic 3D IC. In fact, all of the non-volatile memory vendors have already announced monolithic 3D NAND Flash architectures and their plans for 

[Read more]

EUV vs. TSV: Which one will become production ... - Monolithic 3D

dated 21st Oct

... production ready first? 07/31/2013. 1 Comment. Picture. We have a guest contribution today from Israel Beinglass, the CTO of MonolithIC 3D Inc. Israel debates on the answer to an important question that is on everybody's mind these days

[Read more]

“Atoms Don't Scale”=> What is Beyond 7nm (2019)? MonolithIC 3D

dated 21st Oct

07/23/2013. 0 Comments. Picture. We have a guest contribution today from Brian Cronquist, MonolithIC 3D Inc.'s VP of Technology & IP. Brian discusses about MonolithIC 3D Inc.'s participation at Semicon West 2013

[Read more]

ASML at Semicon West 2013: SRAM scaling has ... - Monolithic 3D

dated 21st Oct

... and the SRAM Bit-Cell". Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi adds information to his previous blog post: Dimension Scaling and the SRAM Bit-Cell

[Read more]

Monolithic 3D is Now in Production: Samsung Starts Mass Producing Industry’s First 3D Vertical NAND Flash

dated 21st Oct

[...]

[Read more]

3D NAND Production Starts at Samsung | EE Times

dated 21st Oct

3D memory era begins as Samsung starts mass production of a multilayered 128 Gbit NAND flash memory based on a charge-trap cell

[Read more]

Samsung sees vertical NAND boosting flash acceptance

dated 21st Oct

3D V-NAND, a new technology for packing more data into flash chips, will dramatically increase the number of PCs and enterprise storage systems that use flash in the next decade, a Samsung Electronics executive said 

[Read more]

Technical Solutions to Mitigate Reliability Challenges due to

dated 21st Oct

... for example, high density 3D stack NAND flash and cross point memories. As transistor based charge storage NVM approaching fundamental limits of NVM characteristics soon, these technical solutions or combination of them could be the 

[Read more]

Scaling makes monolithic 3D IC practical

dated 21st Oct

In the 1960s, James Early of Bell Labs proposed three-dimensional structures as a natural evolution for integrated circuits. Since then many attempts have been made to develop such a technology. So far, none have been able to overcome the 400°C process temperature limitation imposed by the use of aluminum and copper in modern IC technologies for the underlying interconnects without great compromises

[Read more]

Laser thermal anneal to boost performance of 3D memory devices

dated 10th Oct

Nanoelectronics research center imec and Excico have successfully demonstrated the application of laser thermal anneal (LTA) to boost the current in vertical polysilicon channel devices for 3D memory. Due to the larger grain size of the laser recrystallized polycrystalline channel material, up to 10 times higher read current and 2.5 times steeper sub-threshold slope could be obtained as compared to conventional polysilicon channel

[Read more]

MonolithIC 3D Inc. at the 2013 IEEE 3DIC Conference | Designer 3d

dated 7th Oct

MonolithIC 3D Inc. the technology innovator of monolithic 3D, announced today that it was chosen to give a tutorial on monolithic 3D IC at the IEEE International … No related content found. Popularity: unranked [?] 

[Read more]

“Atoms Don't Scale”=> What is Beyond 7nm (2019

dated 7th Oct

However, another form of 3D IC may become truly interesting – the monolithic 3D IC. In fact, all of the non-volatile memory vendors have already announced monolithic 3D NAND Flash architectures and their plans for 

[Read more]

Apply memory BIST to external DRAMs | EDN

dated 7th Oct

3D-stacked designs containing a mix of separate logic and memory die represent a somewhat new application for memory BIST (built-in self-test), compared to the more conventional, single-die embedded SRAM 

[Read more]

Monolithic 3D chip fabricated without TSVs

dated 7th Oct

An alternative to scaling is to expand vertically, by thinning, stacking and interconnecting ICs, commonly called 3D integration. Chip-to-chip Interconnections are are typically made with through-silicon vias (TSVs), but some TSVs also have major disadvantages, including relatively large dimensions, parasitic capacitances and thermal mismatch issues

[Read more]

3D-IC: Two for one | Solid State Technology

dated 7th Oct

Zvi Or-Bach, President & CEO of MonolithIC 3D Inc. blogs about upcoming events related to 3D ICs. This coming October there are two IEEE Conferences discussing 3D IC, both are within an easy drive from Silicon Valley

[Read more]

3D-IC: Two for one

dated 26th Sep

The first one is the IEEE International Conference on 3D System Integration (3D IC), October 2-4, 2013 in San Francisco, and just following in the second week of October is the S3S Conference on October 7-10 in Monterey. The IEEE S3S Conference was enhanced this year to include the 3D IC track and accordingly got the new name S3S (SOI-3D-Subthreshold). It does indicate the growing importance and interest in 3D IC technology

[Read more]

“Atoms Don't Scale”=> What is Beyond 7nm (2019

dated 23rd Sep

However, another form of 3D IC may become truly interesting – the monolithic 3D IC. In fact, all of the non-volatile memory vendors have already announced monolithic 3D NAND Flash architectures and their plans for 

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“Atoms Don't Scale”=> What is Beyond 7nm (2019)? MonolithIC 3D

dated 23rd Sep

Thanks to everybody who came by poster exhibition at the Silicon Innovation Forum at SemiconWest 2013 [SemiWest]! We really enjoyed talking with you about all the exciting possibilities for new products and processes that 

[Read more]

I-Micronews - ADVANCED PACKAGING : MonolithIC 3D Inc

dated 23rd Sep

Industry professionals from 49 countries across the globe have downloaded the tool directly from company's website over 500 times. The MonolithIC 3D team developed the open-source simulator called IntSim v2.5 to help 

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Monolithic 3D - In General, by Iulia Tomut - Free-eBooks.net

dated 23rd Sep

Download the "Monolithic 3D - In General" ebook for FREE. Read and write reviews and more

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IEDM: Moore's Law seen hitting big bump at 14 nm - Monolithic 3D

dated 23rd Sep

The EE Times article covering Imec's Luc van den Hove keynote talk at IEDM 2012 reports: "Chips made at the 14-nm process node may deliver as little as half the typical 30 percent performance increase - and still carry a 

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MonolithIC 3D Inc. at 2013 S3S Conference

dated 23rd Sep

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Monolithic 3D is Now in Production: Samsung Starts Mass Producing Industry’s First 3D Vertical NAND Flash

dated 23rd Sep

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What's After 3D NAND? | Semiconductor Manufacturing & Design

dated 23rd Sep

ReRAM and phase change are top candidates, but the next generation of memory raises a lot of questions

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Monolithic 3D is Now in Production: Samsung Starts Mass

dated 13th Sep

Samsung announced today (Aug. 6, 2013) the mass production of the industry's first three-dimensional (3D) Vertical NAND (V-NAND) flash memory, which breaks through the current scaling limit for existing NAND flash 

[Read more]

Moore's Law Dead By 2022: Crying Wolf? | Solid State Technology

dated 13th Sep

Zvi Or-Bach, President & CEO of MonolithIC 3D Inc. blogs about recent predictions regarding the demise of continued scaling. “Moore's Law Dead by 2022” announces EE Times headline reporting on a keynote by Bob Colwell's at Hot Chips 

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Monolithic 3D is now on the Road-Map for 2019 - Monolithic 3D Inc

dated 13th Sep

In the recent CEA Leti day, that took place as part of Semicon West 2013, Laurent Malier, Leti CEO presented his "A look at the coming Decade". Slide 15 of the presentation provides Leti vision for CMOS roadmaps as 

[Read more]

EUV vs. TSV: Which one will become production ... - MonolithIC 3D

dated 13th Sep

Like every Semicon West show in the past, where many experts are brought together for showing the latest and greatest semiconductor manufacturing equipment and bringing numerous seminar/panel discussions, this 

[Read more]

“Atoms Don't Scale”=> What is Beyond 7nm (2019)? MonolithIC 3D

dated 13th Sep

Thanks to everybody who came by poster exhibition at the Silicon Innovation Forum at SemiconWest 2013 [SemiWest]! We really enjoyed talking with you about all the exciting possibilities for new products and processes that 

[Read more]

ASML at Semicon West 2013: SRAM scaling has ... - MonolithIC 3D

dated 13th Sep

Embedded SRAM will scale from 0.09µm² at 22-20nm node to 0.06µm² at 11-10nm node. In other words only 30% reduction instead of the 4x reduction expected of historical dimension scaling, to roughly 0.02µm²!

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MonolithIC 3D Inc. Announces its Advisory Board Members

dated 13th Sep

Dr. Rajendran and Dr. Lim are two of the leading scientists in 3D IC field. San Jose, CA (PRWEB) April 03, 2013. MonolithIC 3D Inc., a Silicon Valley leading 3D-IC start-up, announced the formation and appointment of two 

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One Thing that ISSCC 2013 Highlighted to Us - Monolithic 3D Inc

dated 13th Sep

IEEE International Solid-State Circuit Conference Feb 17-21, 2013 just ended at San Francisco last week, and the issue of dimension scaling as it relates to EUV and future per transistor device cost was an important item in 

[Read more]

MonolithIC 3D Inc. Granted its 30th Patent on 3D IC Technology

dated 13th Sep

Startup now has 26 issued patents and 4 to be issued soon in the field of monolithic 3D IC. San Jose, CA (PRWEB) March 13, 2013. MonolithIC 3D Inc., a Silicon Valley startup, announced today that it has been granted its 

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Please Help Me Understand IBM - Common ... - MonolithIC 3D

dated 13th Sep

The 2013 Forum today (Feb 5, 2013) started with a presentation by Dr. Gary Patton, VP, IBM Semiconductor Research & Development Center. Gary very clearly articulated the two irresolvable challenges the industry now 

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MonolithIC 3D Inc. at IEEE International Conference on 3D System Integration (3D IC)

dated 13th Sep

Join MonolithIC 3D Inc. at IEEE International Conference o [...]

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NAND flash vendors preparing for a world of 3D NAND chips

dated 13th Sep

Samsung, Toshiba and Micron are all prepping for 3D NAND flash memory

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Samsung unveils first SSDs with 3D V-NAND memory, but only for

dated 13th Sep

Well, that was quick. Samsung said it was producing the world's first 3D vertical NAND memory just a week ago, and it has already started building the

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Toshiba to Build Fab for 3D NAND Flash | EE Times

dated 13th Sep

Phase 2 of Toshiba's Fab 5 at Yokkaichi will be the production site for vertically organized 3D NAND flash memory

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Cascade Effects » Blog Archive » Semiconductor Memory Aids

dated 13th Sep

For example, to scale NAND Flash capacity, Brennan argued, a 3D approach is needed. (In fact, Samsung's already announced a 3D NAND device). As for DRAM challenges, Brennan talked up the hybrid memory cube 

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"Moore's Law Dead by 2022" - Then, Before or .... ?

dated 3rd Sep

"Moore’s Law Dead by 2022” announces EE Times headline reporting Bob Colwell’s keynote at Hot Chips this week. Actual quote: "Moore's Law -- the ability to pack twice as many transistors on the same sliver of silicon every two years -- will come to an end as soon as 2020 at the 7nm node".

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3D NAND - On its Way | The Applied Materials Blog

dated 2nd Sep

The past several weeks have been big for 3D NAND flash technology. Samsung announced it had begun mass production of its first 3D vertical NAND flash memory, a 128GB chip using 24 cell layers. Following this news, at 

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NAND flash vendors gearing up for 3D chips - Login to DIGITIMES

dated 2nd Sep

Micron after Elpida purchase. Micron Technology, which completed its acquisition of Elpida on July 31, said the company will put profits first instead of fighting for market share... Samsung reportedly to outsource more chips

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Samsung produces first 3D NAND, aims to boost densities, drive

dated 2nd Sep

Samsung has announced the mass production of the first 3D NAND chips — and with them, the beginning of a manufacturing initiative that will push solid-state cost-per-GB ever closer to magnetic storage territory. It's been over a year since we first previewed the ... Samsung's secret is an extension of the CTF (charge flash trap) technology first commercially developed by AMD and Fujitsu and deployed in 2002. CTF designs trap an electrical charge in between two 

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Monolithic 3D is Now in Production: Samsung Starts Mass Producing Industry’s First 3D Vertical NAND Flash

dated 28th Aug

[...]

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Monolithic 3D is now on the Road-Map for 2019

dated 28th Aug

"The Evolution of Scaling from the Homogenous Era to the Heterogeneous Era" [...]

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Samsung moves into mass production of 3D flash memory - Gizmag

dated 28th Aug

Samsung has just announced production of 490 and 980 GB solid state drives based on its new 3D V-NAND flash memory. The new architecture functions faster wh

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Samsung Discloses Details of 'V-NAND' 3D NAND Flash -- Tech-On!

dated 28th Aug

Samsung Discloses Details of 'V-NAND' 3D NAND Flash --- Tech-On! is a one-stop online technology news portal published in English, Japanese, and Chinese, and is run by Nikkei Business Publications, Inc. (NikkeiBP), 

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Samsung Intros First 3D V-NAND-based SSD, Up to 960GB

dated 28th Aug

That didn't take long. Earlier this month, Samsung announced that it was now mass producing the industry's first 3D Vertical NAND (V-NAND) flash memory, offering a 128 gigabit (Gb) density in a single chip. Speaking during 

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Flash Memory Summit: What's Driving 3D NAND Flash, What

dated 28th Aug

Home > Community > Blogs > Industry Insights > flash memory summit what s driving 3d nand flash what challenges remain. Login with a Cadence account. Not a member yet? Create a permanent login account to make 

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MU Shows 'Scale In,' Hynix Shows 3D NAND at Flash Show - Tech

dated 28th Aug

A couple Street observers today weighed in on the discussions they observed yesterday in day two of the Flash Summit taking place in Santa Clara, California, which covers NAND flash memory chips and their applications, 

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SNDK, MU: Flash Summit Intrigues with 3D NAND, 'Cold Storage

dated 28th Aug

A number of Street observers last night and this morning were offering up their thoughts on the state of the flash-memory-based storage industry as they trolled the halls at the Flash Memory Summit, which kicked off yesterday 

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Samsung 3D V-NAND SSD Announced | StorageReview.com

dated 28th Aug

Samsung is announcing the first SSD based on its 3D V-NAND technology which is designed for enterprise server and data center applications. The announcement has been made at the Flash Memory Summit in which we 

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Flash Memory Summit 2013 - 3D NAND Flash, EUV, Consolidation

dated 28th Aug

The Eighth Annual Flash Memory Summit convenes this week at the Santa Clara Convention Center, Santa Clara, California. The hot topic focus this year is on 3D NAND-Flash and next generation non-volatile memories

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What is Going on with Sub-20nm Flash? | The Applied Materials Blog

dated 28th Aug

3D NAND presents some significant changes to the traditional semiconductor manufacturing model. For example, the physical characteristics of 3D NAND (i.e. NAND cells are built on the Z axis, not just X and Y) are such that 

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3D NAND Flash Memory: Coming Soon - Solar Feeds

dated 28th Aug

3d-nand. The past several weeks have been big for 3D NAND flash technology. Samsung announced it had begun mass production of its first 3D vertical NAND flash memory, a 128GB chip using 24 cell layers. Following this 

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RAM wars: RRAM vs. 3D NAND flash, and the winner is...us

dated 28th Aug

You may soon have a smartphone or tablet with more than a terabyte of high-speed storage

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Micron to unveil 3D NAND flash by 1Q 2014 | storageservers

dated 28th Aug

Micron, a popular NAND flash manufacturer has announced that it will start providing 3D NAND flash samples by 1Q of 2014. However, the company failed to specify details about end devices which use this technology, but 

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Toshiba Lectures on 'BiCS' 3D NAND Flash Memory -- Tech-On!

dated 28th Aug

Toshiba Lectures on 'BiCS' 3D NAND Flash Memory --- Tech-On! is a one-stop online technology news portal published in English, Japanese, and Chinese, and is run by Nikkei Business Publications, Inc. (NikkeiBP), Japan's 

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Unveils Crossbar RRAM Non-Volatile Memory Technology

dated 28th Aug

Continuing on this trajectory, they could lead the market with a cost effective crosspoint, multi-layer (8) RRAM ahead of the 3D NAND or their 3D RRAM competition.” Yatin Mundkur, Partner, Artiman Ventures. “We are thrilled 

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Monolithic 3D is Now in Production: Samsung Starts Mass Producing Industry’s First 3D Vertical NAND Flash

dated 19th Aug

Samsung announced today (Aug. 6, 2013) the mass production of the industry's first three-dimensional (3D) Vertical NAND (V-NAND) flash memory, which breaks through the current scaling limit for existing NAND flash technology. Achieving gains in performance and area ratio, the new 3D V-NAND will be used for a wide range of consumer electronics and enterprise applications, including embedded NAND storage and solid state drives (SSDs)

[Read more]

Monolithic 3D is now on the Road-Map for 2019

dated 12th Aug

In the recent CEA Leti day, that took place as part of Semicon West 2013, Laurent Malier, Leti CEO presented his "A look at the coming Decade". Slide 15 of the presentation provides Leti vision for CMOS roadmaps as presented here:

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EUV vs. TSV: Which one will become production ready first?

dated 31st Jul

Like every Semicon West show in the past, where many experts are brought together for showing the latest and greatest semiconductor manufacturing equipment and bringing numerous seminar/panel discussions, this Semicon West of 2013 was no different. Two major issues were discussed, which on the face of it look unrelated, that caught my attention:

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SanDisk Earnings Call Nuggets: 3D NAND and Software Revenue

dated 26th Jul

SanDisk Corp (NASDAQ:SNDK) recently reported its second quarter earnings and discussed the following topics in its earnings conference call. 3D NAND. Michael Chen – Credit Suisse: Hi. This is Michael Chen speaking in 

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“Atoms Don’t Scale”=> What is Beyond 7nm (2019)? MonolithIC 3D™ - the Future of Semiconductor Scaling

dated 23rd Jul

Thanks to everybody who came by poster exhibition at the Silicon Innovation Forum at SemiconWest 2013 [SemiWest]! We really enjoyed talking with you about all the exciting possibilities for new products and processes that are enabled by monolithic 3D IC

[Read more]

Toshiba to Build Manufacturing Base for 3D NAND -- Tech-On!

dated 19th Jul

Toshiba to Build Manufacturing Base for 3D NAND --- Tech-On! is a one-stop online technology news portal published in English, Japanese, and Chinese, and is run by Nikkei Business Publications, Inc. (NikkeiBP), Japan's 

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ASML at Semicon West 2013: SRAM scaling has Stopped!

dated 18th Jul

I just downloaded the ASML presentation from Semicon West2013 site - ASML's NXE Platform Performance and Volume Introduction. Slide #5 - IC manufacture's road maps - says it all

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Toshiba to Build Fab for 3D NAND Flash | AMPERANZA

dated 10th Jul

LONDON — Toshiba is preparing to increase NAND flash manufacturing capacity and move to vertically organized 3D NAND with the start of construction in August of the second phase of Fab 5 at its Yokkaichi facility in Mie, Japan

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Toshiba's New NAND Memory Plant Likely Good News for Apple

dated 10th Jul

But news out of Japan today shows that one of Apple's suppliers are building a new NAND Flash memory factory to handle 2D and 3D variants.This could be music to Apple's ears. A new Nikkei Business Publication report 

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Design How-To - Intel outlines 3-D NAND transition | EE Times

dated 10th Jul

NO RATINGS. Login to Rate. It's kind of spurise for me when I saw "high endurance of 10^5 cycles and higher". NAND has been far away from that spec for a few generations, why intel put that back again in the reliability spec of their 3D NAND 

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3D InCites | 3D InCites Guide to SEMICON West 3D Events

dated 1st Jul

These include Advenira, a materials company; Beam Services, an equipment supplier; and MonolithIC 3D, IP developer. I hope to learn more about them during the event. Wednesday, July 10. SEMETECH 3D Metrology 

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IMEC helps scale NAND flash below 20-nm - EE Times

dated 1st Jul

6/24/2013 6:13 AM EDT. I'd be interested either way the appearance of sub-19 or 3d nand. More... FraAmelia. 6/24/2013 4:51 AM EDT. I agree with NAND Rule. @20nm and below (I mean in BL and WL direction) It does

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Toshiba Lectures on 'BiCS' 3D NAND Flash Memory -- Tech-On!

dated 1st Jul

Toshiba Lectures on 'BiCS' 3D NAND Flash Memory --- Tech-On! is a one-stop online technology news portal published in English, Japanese, and Chinese, and is run by Nikkei Business Publications, Inc. (NikkeiBP), Japan's 

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Toshiba Develops First Multi-level-cell Structure MROM cell, 'BiCS

dated 1st Jul

Nitayama also compared the BiCS with other 3D NAND flash memories being developed by other companies and said that the BiCS is the most promising technology for Tbit-class storage devices in terms of the number of 

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Toshiba Develops First Multi-level-cell Structure MROM cell, 'BiCS

dated 19th Jun

Nitayama also compared the BiCS with other 3D NAND flash memories being developed by other companies and said that the BiCS is the most promising technology for Tbit-class storage devices in terms of the number of 

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IMFT boss expects 2D flash to scale down to 10 nanometers - The

dated 19th Jun

Intel already has a 22-nm chip fabrication process that uses a "3D" gate structure, but that's not what Esfarjani is talking about. 3D NAND refers to flash memory that stacks multiple cell layers on top of each other. EE Times 

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Three-dimensional NAND flash from a 15 nanometer process | Ezesurf

dated 19th Jun

IM Flash Technologies, a joint venture between Intel аnd Micron Technologies, іѕ evaluating modalities аnd timing οf thе transition tο production οf NAND flash memories, though three-dimensional recognizes thаt recent 

[Read more]

Intel reveals 3D NAND plans - Fudzilla

dated 19th Jun

Keyvan Esfarjani, technology & manufacturing VP at Intel and co-CEO of IM Flash Technologies (IMFT) told the Imec Technology Forum some of Chipzilla's plans behind its 3D NAND strategy. IMFT is a joint venture between 

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Intel outlines 3-D NAND transition - EE Times

dated 19th Jun

BRUSSELS, Belgium – IM Flash Technologies LLC (Lehi, Utah), the joint venture between Intel and Micron Technologies, is considering how and when to take its NAND flash memory ICs into the third dimension but reckons its development of a 20-nm memory cell has bought it a generation or two of 2-D scaling. Speaking .... NAND has been far away from that spec for a few generations, why intel put that back again in the reliability spec of their 3D NAND? Sign in to 

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3D NAND Market Heats Up | Semiconductor Manufacturing

dated 19th Jun

“Scaling of planar NAND is nearing its end, and 3D NAND is seen as the way to continue density increases and cost reductions for NAND flash memory.” With 3D NAND, memory vendors also will move from a costly 

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Please Help Me Understand IBM - Common Platform ... - Monolithic 3D

dated 8th Apr

These two challenges connect very well with our recent blog IEDM 2012 - The Pivotal Point for Monolithic 3D IC. Gary showed both the exponential increase of RC which results from the dimensional scaling of copper below

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IEDM 2012 - The Pivotal Point for Monolithic 3D IC - Monolithic 3D

dated 8th Apr

From our biased point of view we see the recent IEDM12 as a pivotal point for monolithic 3D. Here's why: We start with the EE Times article IEDM goes deep on 3-D circuits, starting with "Continuing on the theme of 3-D circuit

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Can Heat Be Removed from 3D-IC Stacks? - Monolithic 3D Inc., the

dated 8th Apr

Monolithic 3D stacking technology is the answer: keeping the next evolutionary step of our industry in the wafer fab, where the batch economics of the silicon wafer can be enjoyed, and avoiding the costly piece-part assembly

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IEDM: Moore's Law seen hitting big bump at 14 nm - Monolithic 3D

dated 8th Apr

Imec's Luc van den Hove vs. Intel's Mark Bohr. Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi discusses EE Time's article about: "Moore's Law seen hitting big bump at

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Qualcomm overtakes Intel in market capitalization - Monolithic 3D

dated 8th Apr

MonolithIC 3D Inc. is an IP company with operations in Silicon Valley, Romania and Israel. It invented and developed a practical path to the monolithic 3D Integrated Circuit, which includes multiple derivatives for Logic,

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3D NAND Opens the Door for Monolithic 3D - Monolithic 3D Inc., the

dated 8th Apr

3D NAND Opens the Door for Monolithic 3D. 10/01/2012. 7 Comments. Picture. We have a guest contribution today from Israel Beinglass, the CTO of MonolithIC 3D Inc. Israel discusses the opportunities of 3D NAND with

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Low Temperature Cleaving - Monolithic 3D Inc., the Next Generation

dated 8th Apr

We really enjoyed talking with you about all the exciting possibilities for new products and processes that are enabled by monolithic 3D IC. For those who could not make it, here is what our booth looked like: Picture. Nice tie

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Is the Cost Reduction Associated with Scaling Over? - Monolithic 3D

dated 8th Apr

Yes, unless we Augment Dimensional Scaling with monolithic 3D-IC Scaling. Picture. We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi discusses about Cost Reduction

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Intel vs. the Foundries: where is advanced logic ... - Monolithic 3D

dated 8th Apr

Intel vs. the Foundries: where is advanced logic heading? 06/04/2012. 3 Comments. Picture. We have a guest contribution today from Israel Beinglass, the CTO of MonolithIC 3D Inc. Israel discusses about Intel vs. Foundries

[Read more]

Monolithic 3D - In General, by Iulia Tomut

dated 8th Apr

Download the "Monolithic 3D - In General" ebook for FREE. Read and write reviews and more

[Read more]

One Thing that ISSCC 2013 Highlighted to Us

dated 29th Mar

Dimension Scaling and the SRAM Bit-Cell [...]

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Toshiba, Sony see semiconductor revenues grow - DigiTimes

dated 29th Mar

Toshiba is expected to continue being the largest semiconductor firm in Japan. The firm plans to begin the volume production of NAND flash using the 15-18nm technology in 2013 and develop 3D NAND flash technologies

[Read more]

Micron Shipped Record Amount of SSDs in the Recent Quarter

dated 29th Mar

“On the technology and operations front, we are making steady technical advancements with both our planar and 3D NAND technologies. We began shipping our 20nm TLC NAND flash and continued to increase our 20nm

[Read more]

Predicting the ReRAM Roadmap | CBRAM/RRAM Blog

dated 29th Mar

Predicting this is fraught with uncertainty but SanDisk have been quoted as saying that there are two nodes left for conventional planar NAND (1Ynm later this year and 1Z next year). At that point, 3D NAND is seen as the

[Read more]

DNA 3D Nand Gate Bricks Would Be Able to Make a Computer with

dated 29th Mar

David Fuchs at Hephastus Project outlines what kind of computing would be possible with 25 nanometer 3D Nand bricks. A one inch cube could hold 1,000,000,000,000,000,000 of these 25 nm bricks. Using two simple

[Read more]

Infinitely Expandable Computing Using Three Dimensional

dated 29th Mar

Software becomes nothing more than the configuration of the 3D NAND array. This removes a huge amount of overhead, allows optimization in ways that can not be done on standard computer systems, and speeds up

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Micron's Management Discusses Flash Memory and SSD F2Q 2013

dated 29th Mar

On the technology and operations front, we are making steady technical advancements with both our planar and 3D NAND technologies. We began shipping our 20-nanometer TLC NAND flash and continued to increase our

[Read more]

Dimension Scaling and the SRAM Bit-Cell

dated 25th Mar

IEEE International Solid-State Circuit Conference Feb 17-21, 2013 just ended at San Francisco last week, and the issue of dimension scaling as it relates to EUV and future per transistor device cost was an important item in the plenary session. But the issue of scaling as it relates to the SRAM was an important item in many of the session as we will farther discus herein

[Read more]

One Thing that ISSCC 2013 Highlighted to Us

dated 24th Mar

IEEE International Solid-State Circuit Conference Feb 17-21, 2013 just ended at San Francisco last week, and the issue of dimension scaling as it relates to EUV and future per transistor device cost was an important item in the plenary session. But the issue of scaling as it relates to the SRAM was an important item in many of the session as we will farther discus herein

[Read more]

Current Trends Driving Applied's $13 Valuation -- Trefis

dated 25th Feb

With new application wins in NAND flash, improving prices and higher utilization rates, the company is seeing positive momentum. Additionally, Applied anticipates higher spending this year for building the 3D NAND

[Read more]

New NV memories to be $1.6bn market in 2018. | SMART Group

dated 25th Feb

Mass storage markets served by flash NAND could begin using 3D RRAM in 2017-2018, when 3D NAND will slow down its scalability as predicted by all of the main memory players. When this happens, a massive RRAM

[Read more]

OCZ Announces 20 nm NAND Flash Version of Vertex 3 Series

dated 25th Feb

OCZ Technology Group, Inc., a leading provider of high-performance solid-state drives (SSDs) for computing devices and systems, today announced a new 20 nanometer (nm) NAND flash version of its award-winning Vertex

[Read more]

Micron RealSSD P400m Enterprise SSD Review - HotHardware

dated 25th Feb

According to Micron, “The P400m takes full advantage of Micron's vertical integration with XPERT and a custom MLC NAND device designed specifically for our enterprise SSD product line. This NAND device is built using our

[Read more]

IEDM 2012 - The Pivotal Point for Monolithic 3D IC

dated 15th Feb

[...]

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Please Help Me Understand IBM - Common Platform Technology Forum 2013

dated 10th Feb

"Innovations for Next Generation Scaling" We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi discusses The Common Platform Technology Forum 2013

[Read more]

Please Help Me Understand IBM - Common Platform Technology Forum 2013

dated 10th Feb

The 2013 Forum today (Feb 5, 2013) started with a presentation by Dr. Gary Patton, VP, IBM Semiconductor Research & Development Center. Gary very clearly articulated the two irresolvable challenges the industry now faces:

[Read more]

IEDM 2012: The pivotal point for monolithic 3D ICs

dated 28th Jan

Zvi Or-Bach, President & CEO of MonolithIC 3D Inc., San Jose, CA, blogs about the evolution of 3D technology seen at the International Electron Devices Meeting. From our biased point of view we see the recent IEDM12 as a pivotal point for monolithic 3D. Here’s why:

[Read more]

Underlying technologies for non-volatile memories | EDN

dated 21st Jan

Charge Trap and Three-Dimensional (3D) NAND In order to continue to scale NAND Flash, the industry is evaluating two possible ways to scale below the 20 nm level: 1) Three-Dimensional cell; and 2) planar cell, such as

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e4TechHub | US 7995390 NAND flash memory array with cut-off

dated 14th Jan

A NAND flash memory array, an operating method and a fabricating method of the same are provided. The NAND flash memory array has a cut-off gate line under a control gate in order to operate two cells having vertical

[Read more]

Developed three-dimensional memory ReRAM large capacity

dated 10th Jan

Samsung has got involved in the development of three-dimensional realization of memory ReRAM (or VRRAM – vertical ReRAM) in order to finally find a replacement for bad NAND-memory. In general, the technology

[Read more]

Micron: Demand for Solid-State Drives Up 20% Quarter-over

dated 7th Jan

In addition, the company continues to explore new types of NAND flash memory, including 3D NAND flash and 3-bits-per-cell NAND flash. “We continue to be pleased with our solid-state drive business as these shipments

[Read more]

NAND Scaling Challenges, High Tech

dated 7th Jan

electronics.wesrch.com - Papers - NAND Scaling Challenges, High Tech. ... Nand Scalling Challenges ... Node 1Ynm Meeting the Challenge 3-Pronged Strategy to Meet the Technology Challenge 3D Resistive RAM (ReRAM) NAND Scaling BiCS 3D NAND Demand for Storage Adding the 3rd Dimension: BiCS and 3D Crosspoint BIT COST SCALABLE (BICS) 3D CROSSPOINT RESISTIVE RAM 3D NAND 3D RRAM > Existing NAND Toolsets > Vertical NAND Strings

[Read more]

3D Process Integration & 3D Chip Stacking, High Tech

dated 7th Jan

Tech., 2009 After our BiCS proposal, various 3D NAND cells have been proposed. BiCS has smaller cell size, simpler process and better disturb immunity. BiCS is the most promising 3D Flash memory. 33 Expansion of BiCS

[Read more]

3D Flash NAND Devices and Process - Semiconductor Experts

dated 7th Jan

"According to Applied Materials, building 3D NAND structures in like trying to dig a one-kilometer-deep, three-kilometer-long trench with walls exactly three meters apart, through interleaved rock strata." Ron Maltiel

[Read more]

New Discovery Could Give NAND Flash Memory a ... - USB News

dated 19th Dec

An interesting and potentially useful discovery by ROM manufacturer Macronix has uncovered a new method that could give NAND Flash Memory a longer lifespan of 100 million cycles. ... USB Toy 3D Webcam from Thanko

[Read more]

Can Heat Be Removed from 3D-IC Stacks?

dated 19th Dec

Thanks to everybody who came to IEDM this year, and especially to those I met and who came to paper 14.2, delivered by Hai Wei of Stanford University. You can find the meeting paper and slides here

[Read more]

Samsung Develops Memory Cell for Large-capacity 3D ReRAM

dated 17th Dec

Samsung Electronics Co Ltd developed a memory cell technology for realizing a 3D ReRAM (resistive random-access memory) whose capacity is larger than that of NAND flash memory. The new technology realizes a

[Read more]

3D Flash NAND Devices and Process - Ron Maltiel

dated 10th Dec

"According to Applied Materials, building 3D NAND structures in like trying to dig a one-kilometer-deep, three-kilometer-long trench with walls exactly three meters apart, through interleaved rock strata." Ron Maltiel

[Read more]

3D NAND and 3D ReRAM « SanDisk etc

dated 10th Dec

Time to wrap up this first pass at 3D NAND. There are a couple of points which I didn't get to in the first two posts, which I'll touch on here. Of particular interest is the relationship of 3D NAND to future post-NAND memory

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IEDM preview: Intel's 22nm mobile technology and more

dated 10th Dec

The most likely replacement for NAND flash, however, continues to be 3D stacked flash memory. Micron and Intel, SK Hynix and Macronix will all talk about their work on 3D NAND. 2. EETimes has an IEDM preview as well

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3D Company Updates

dated 5th Dec

There are a couple of notable updates circulating this week involving companies in the 3D space. The first I saw was news from Sony that it has introduced its next-generation CMOS Image sensor they claim is “ the industry's smallest, CMOS image sensor and camera system”.

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“Self-healing” NAND flash memory « adafruit industries blog

dated 3rd Dec

“Flash wears out after being programmed and erased about 10,000 times,” said the IEEE Spectrum. Engineers at Macronix have a solution that moves flash memory over to a new life. They propose a “self-healing” NAND flash

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Why Most NAND Rankings Ignore SanDisk | The Memory Guy

dated 3rd Dec

SanDisk Doesn't Show Up in NAND Market Share Figures Every so often I run into someone who asks about the discrepancy between various analysts' NAND market share rankings and SanDisk's shipments. After all

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NAND flash makers gearing up for process transition - DigiTimes

dated 3rd Dec

... announces updates to developer ecosystem programs · Acquiring Sony battery biz will help Foxconn strengthen vertical integration · Taiwan market: Taiwan Mobile launches cross-platform mobile streaming video services

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Unity/Rambus | CBRAM/RRAM Blog

dated 3rd Dec

Moving to a vertical crosspoint array is vastly simplified by the lack of a need for a select device and eliminates the need for (currently) costly minimum feature lithography. ... As he described in his Flash Memory Summit presentation, PCRAM is not inherently fast enough for main memory (DRAM replacement) and while it is faster than NAND, it cannot combine the density (smallest cell size) and speed of ReRAM for data storage (NAND replacement). PCRAM requires

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Focus on monolithic 3D-ICs paradigm shift for semicon industry

dated 21st Nov

MonolithIC 3D Inc. was established in 2009 by Dr. Zvi Or-Bach, a well-known Silicon Valley serial entrepreneur, as NuPGA. The NuPGA's mission was to develop programmable logic technology with density, speed, and

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How can we escape the dreaded NAND-woes? « Storage CH Blog

dated 21st Nov

Post by Chris Mellor (thank you) over at El Reg – Good background information on the NAND technologies pitfalls The NAND flash industry is facing a process size shrink crunch and no replacement technology is ready. Unless 3D die stacking works, we are facing a solid state storage capacity shortage. The NAND flash foundries are…

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Electronics-Lab.com Blog » 3D NAND flash is coming

dated 21st Nov

3D NAND flash is coming. Posted by admin on November 15th, 2012. Brian Bailey writes : Flash memory has very quickly risen from being an obscure memory type to perhaps becoming the dominant memory type for many devices, including

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Qualcomm overtakes Intel in market capitalization

dated 20th Nov

On Nov 9, 2012 we learned that Qualcomm overtook Intel in market capitalization. Quite shocking news if one considers that Intel’s revenue is almost three times that of Qualcomm and its net margin is more than twice that of Qualcomm

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Macronix Exhibits at Electronica 2012 | Virtual-Strategy Magazine

dated 14th Nov

During the exhibition, Macronix will present its 3D VG (Vertical Gate) NAND Flash using its patented BE-SONOS (barrier engineering) charge-trapping technology and 3D decoding architecture. Traditional NAND Flash will be

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Moore's Law: Solid State Technology: New level of repeatability

dated 7th Nov

Historically, manufacturers have increased memory density by packing more cells together in a single plane. As traditional dimensional shrinks become increasingly difficult, the industry is transitioning from planar to 3D NAND

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Some 3D Technology Tidbits

dated 31st Oct

Glass interposers got a thumbs up from i-MicroNews in a “Closer Look” post reviewing Corning’s Peter Bocko’s presentation at IMAPS 2012. Based on work done as part of Ga Tech’s consortium, Bocko demonstrated that “glass interposers show less warp during chip assembly, faster signal propagation and significantly reduced signal loss. In fact they found a 10x lower signal loss in glass for a 6x longer interconnect. Such a 60x lower leakage improves power efficiency,”

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Who Will Be the Winners?

dated 29th Oct

The semiconductor industry is in the doldrums. The PC market shrinks, Intel shares sink, Applied Materials cuts staff, and even Apple suddenly experiences its share price drop by $100 in a month. Are things really so bad?

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NAND flash memory might get too dense at 10nm

dated 22nd Oct

The adoption rate of Solid state disks is fast and they are getting faster and faster. To gain higher volume sizes the NAND ICs need to shrink and that could pose an issue in the near future. Shrinking the die sizes of flash

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3D NAND Opens the Door for Monolithic 3D

dated 8th Oct

[...]

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Universal Memories Fall Back To Earth | Semiconductor

dated 3rd Oct

In one possible scenario in the next five years (or longer), a next-generation MRAM called spin-torque MRAM (STT-RAM) is the candidate to replace DRAM and SRAM. Also in the distant future, 3D NAND and ReRAM may

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3D NAND « SanDisk etc

dated 3rd Oct

NAND as we know it is reaching the end of the line. It's been a good run. But Judgement Day is Coming! 2014 looks like the year. Not so far off. 3D NAND looks like the technology ready to pick up where 2D NAND leaves off

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Kilopass Announces Breakthrough Technology to Quadruple

dated 24th Sep

Kilopass describes today its new embedded VCM (Vertical Cross-point Memory) NVM IP bit cell. The new VCM bit cell quadruples the density of today's anti-fuse ... By comparison, a typical embedded flash memory has an area of about 50 F2, and the state-of-the-art NAND flash bit cell with a fully customized memory process technology and extra cost can only achieve 6F2, about half of the area of the VCM bit cell. The VCM bit cell is the densest eNVM that exists in

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Solid State Drives: Is vertical integration key to survive in flash

dated 24th Sep

As a result NAND flash manufacturers are increasingly focusing on vertical integration, or ways to develop partner ecosystem, to provide complete SSD solutions for embedded and server applications. Posted by Gupta at 2:00

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Applied's Avatar Tackles V-NAND Dielectric Etch_120627 :: 네이버

dated 18th Sep

The ability to create vertically stacked memory bits used in 3D NAND devices, expected to replace the planar NAND memories in the next few years, leans heavily on precise etch capabilities. Applied Materials today (June 27)

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Etching 3D NAND Flash Memories ... with Bradley Howard

dated 6th Sep

Plasma etch has never been as challenged as it is today by the transition from planar NAND flash structures to 3D. The incredible cost-per-bit reduction of NAND that has made smartphones and tablets economically viable

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Want to know why SK hynix is placing - Denali Memory Report

dated 3rd Sep

Consequently, there's a quest for developing 3D NAND Flash cell structures, which greatly expand the volumetric capacity of the bit cell's floating gate. Park showed a slide with four proposed 3D NAND cell designs from

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Keynote: New Memory Technologies Challenge NAND Flash and

dated 3rd Sep

3D NAND structures could help with the scaling problem, Park suggested. He briefly reviewed several proposed 3D NAND structures including the Toshiba p-BiCS, Samsung TCAT, Hynix 3D FG, and Micron architectures

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What's After NAND Flash? | Semiconductor Manufacturing & Design

dated 20th Aug

While it still has a couple nodes of life left in it, predictions for its demise finally appear to be true; options include 3D NAND as well as number of more exotic solutions

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Applied Materials develops Centura Avatar etcher for enabling 3D

dated 6th Aug

About a year ago, I wrote an EDA360 Insider blog entry about 3D NAND Flash semiconductor memory. (See “3D Thursday: A look at some genuine 3D NAND cells, courtesy of Micron”) In this post, I discussed a talk by Glen

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New manufacturing technology enables vertical 3D NAND transistors

dated 6th Aug

According to a folks during Applied Materials, perplexing to build 3D NAND structures in genuine life would be like perplexing to puncture a one-kilometer-deep, three-kilometer-long ditch with walls accurately 3 meters apart,

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Samsung begins producing fastest embedded NAND Storage

dated 6th Aug

It will improve system performance and the user experience for a wide variety of applications including web browsing, 3D and HD video capture and playback, multi-tasking activities, augmented reality and the use of social networking sites and interactive graphics-rich gaming. The ultra high-speed ... The new eMMC's fully managed NAND memory comes with its own high performance controller and intelligent flash management firmware. To meet the market need for

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Toshiba to Cut NAND Production by 30% | The Memory Guy

dated 6th Aug

In a surprise announcement Toshiba has said that it will immediately cut NAND flash production by approximately 30%. The company explains that this is being done “to reduce inventory in the market and improve the overall

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Max Maxfield’s 3D IC Trilogy

dated 31st Jul

Throughout the past month, Max Maxfield, Editor in Chief of All Programmable Planet, has been examining 3D ICs, past, present and future, in a noble attempt to make sense of the confusion. The result turned into a blog post trilogy that does just that. Here’s a summary of each post that together provide a comprehensive primer of 3D ICs. If you book mark THIS page, you’ll have a useful resource for easy reference

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Printed photonic crystal mirrors shrink on-chip lasers down to size

dated 23rd Jul

Electrical engineers at The University of Texas at Arlington and at the University of Wisconsin-Madison have devised a new laser for on-chip optical connections that could give computers a huge boost in speed and energy efficiency

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New manufacturing technology enables vertical 3D NAND transistors, higher capacity SSDs

dated 28th Jun

Applied Materials has taken the wraps off a new etching system meant to turn vertically stacked, three-dimensional transistors from lab experiments into commercial reality. The new Centura Avatar solves multiple problems facing manufacturers who are interested in 3D NAND but find their current equipment not up to the task of actually building it. While we’re specifically talking about 3D NAND today, a number of the challenges to scaling flash memory apply to scaling CPU logic as well

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Applied Materials builds vertically stacked, 3D transistors

dated 28th Jun

Applied Materials has been showing off its new etching system which it claims can create vertically stacked, three-dimensional transistors. The Centura Avatar process is supposed to fix problems facing manufacturers who are interested in 3D NAND.

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Helping Flash Memory Grow Up: Etch Technology for the Terabit Era

dated 27th Jun

It might be the understatement of the year to say that Flash memory is popular. Every year, we consume nearly twice as many bits as the year before

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Through Silicon Via (TSV) Multi Part Wafer (MPW) by IPDiA

dated 22nd Jun

IPDiA, a leading supplier of silicon passive components and 3D silicon packaging is offering what is probably the first call to participate to a Through Silicon Via (TSV) Multi Part Wafer (MPW) or so-called “pizza mask”. Through

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Is the Cost Reduction Associated with Scaling Over?

dated 22nd Jun

Yes, unless we Augment Dimensional Scaling with monolithic 3D-IC Scaling [...]

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Will SSDs be the first big market for 3D NAND Flash memories

dated 22nd Jun

I've been meaning to write about a comment regarding NAND Flash memory and SSDs written by Thomas McCormick in LinkedIn's Solid State Storage Group and this seems like the perfect time. McCormick is an Integrated

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QNX's Sebastien Marineau-Mes selected Top Innovator in

dated 18th Jun

The two other industry leaders awarded for Silicon and Strategies (respectively) were Zvi Or-Bach, CEO of MonolithIC 3D, and Dr. Kwok Wu, Head of Embedded Software and Systems at Freescale Semiconductor. The top

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Stanford Engineers Make Progress in Addressing Limitations of

dated 18th Jun

The Stanford engineers have demonstrated their technique by developing sequential storage and arithmetic circuits and a monolithic 3D integrated circuit. Source: http://engineering.stanford.edu/. Latest News

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Low Profile 3D Silicon Capacitors for Embedded Technology

dated 12th Jun

Low Profile 3D Silicon Capacitors for Embedded Technology (100μm Thickness). It is a well known fact that standard passive ... Greenliant Now Shipping Industrial Grade SATA NAND... Greenliant Systems Appoints Avnet

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Emerging Memories Take Stage at VLSI Symposium

dated 12th Jun

“Despite vertical stacking, the lateral scaling of 3D NAND flash is critically important because otherwise more than 16 stacking layers are needed to be cost competitive to 20nm 2D NAND,” the Macronix researchers claim

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'NVM Beyond NAND: Trends in the Flash Memory Market

dated 12th Jun

... Flash Industry, Enterprise Servers & Storage, Solid State Drives, NAND Industry Bit Growth Moderating, Supply And Demand Harmony, NVM Continues Beyond NAND, Adding the 3rd Dimension: BiCS and 3D Crosspoint

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Ziptronix Takes on 3D Memory

dated 10th Jun

After seeing the latest press release on Ziptronix foray into the memory space, I sought out Kathy Cook, business development manager at Ziptronix, at ECTC to get the full story. We’ve been reading and hearing a lot about Ziptronix ZiBond process being used in CMOS image sensor (BSI) technology, and particularly in its recent partnership with Sony for CIS with backside illumination (BSI). ZiBond is the name of the company’s patented room temperature direct oxide bond technology. The latest announcement involves the company’s second product, direct bond interconnect (DBI), which is an extension of the ZiBond process that forms actual interconnects between die with or without through silicon vias (TSVs).

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Industry Standard FinFET versus Intel Tri-Gate!

dated 4th Jun

Ever since the “Intel Reinvents Transistors Using New 3-D Structure” PR campaign I have been at odds with them. As technologists, I have nothing but respect for Intel. The Intel PR department, however, quite frankly, is evil. Correct me if I’m wrong here but Intel did not “reinvent” the transistor. Nor did they come up with the name Tri-Gate. If not for prior art, Intel would certainly have trademarked it, my opinion

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Intel vs. the Foundries: where is advanced logic heading?

dated 4th Jun

A lot of turmoil recently arose over the lack of TSMC capacity to support the 28nm logic ramp. Some of the larger TSMC customers such as Qualcomm and Nvidia made public their disenchantment with TSMC’s delivery of 28nm products.

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Intel Tri-Gate is in Trouble?!?!?!

dated 23rd May

The word around Silicon Valley is that Intel is having manufacturing issues at 22nm. The first indication is product launch delays, but more importantly, the dissection of the 22nm silicon. The conclusions being made are:

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3D process once again triggered the IC industry development mode

dated 17th May

Last year EE Times ACE annual innovation awards Zvi Or-Bach think 3D IC designers need from the silicon through-hole technology transition to super high density monolithic 3D technology. BeSang Inc claims being made

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3D chip stack is not the latest technology

dated 13th May

At present the most advanced technology should be used silicon through-hole3D chips are stacked,AM2140-10JC price, almost leading semiconductor companies are working on the technology

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NextGenLog: #CHIPS: "Learn Next-Gen Semiconductors at VLSI

dated 11th May

A Highly Pitch Scalable 3D Vertical Gate (VG) NAND Flash Decoded by a Novel Self-Aligned Independently Controlled Double Gate (IDG) String Select Transistor (SSL), C.-P. Chen et al., Macronix International, Ltd

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"-Intel exec says fabless model 'collapsing"-'fab' or reality-?

dated 7th May

We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi discusses about the latest news regarding the reversal of the trend from Foundry model back to the IDM model.

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Qualcomm's Nick Yu says “3D DRAM stacking has started—it's

dated 2nd May

Qualcomm has been working on 3D IC technology development projects to help prepare the company for a 3D future. “3D DRAM stacking has started—it's shipping in products because it has maintained the bit density/cost

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Emerging Memories Take Stage at VLSI Symposium

dated 2nd May

The 2012 Symposia on VLSI Technology & Circuits, planned for mid-June in Honolulu, points to future directions in memory technology, including 3-D NAND, spin torque transfer MRAM, ferroelectric memories, and other emerging memory types. Intel’s K. Zhang will give an invited paper on SRAMs using tri-gate transistors, scheduled for June 13th in the late morning

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Next Generation Transistors: a Tutorial from the Master

dated 30th Apr

We have all heard that planar transistors have run out of steam. There are two ways forward. The one that has garnered all the attention is Intel's trigate which is their name for FinFET. The other is using thin film SoI which ST is doing. TSMC and Global seem to be going the FinFET way too, although at a more leisurely pace. But why are planar transistors running out of steam? And why are these the two promising ways forward? Dr Chenmin Hu, the inventor of the FinFET first described in a 1999 paper (pdf), gave us all a tutorial. It was fascinating. I thought that most of the power of the FinFET came because the gate wraps around the channel on three sides and three is better than one. But that is not the real story

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Professor Chenming Hu talks FinFETs and FDSOI at the GSA Silicon Summit

dated 30th Apr

Chenming Hu, TSMC Distinguished Chair Professor of Microelectronics at University of California at Berkeley gave a keynote talk on FinFETs and FDSOI (fully depleted silicon on insulator) today at the GSA Silicon Summit held at the Computer History Museum in … Continue reading →

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PC's Semiconductors Blog: Micron and Hynix close gap on NAND

dated 30th Apr

EL SEGUNDO, USA: Solid manufacturing and strong pricing allowed Micron Technology Inc. and Hynix Semiconductor Inc. to post strong performances in the global NAND flash business in the fourth quarter, allowing them to narrow the gap in market share between them and the industry leaders, and setting the stage for further advances in 2012. No. 3-ranked Micron ... GLOBALFOUNDRIES Fab 8 adds tools to enable 3D chip... IR to showcase automotive power

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Intel says fabless model collapsing... really?

dated 30th Apr

There is an interesting discussion in the SemiWiki forum in response to the EETimes article: Intel exec says fabless model 'collapsing'. Definitely an interesting debate, one worth our time since the advertising click hungry industry pundits will certainly jump all over it. Clearly I’m biased since I helped build the semiconductor ecosystem. I will certainly try and be open minded here, but probably not

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Silicon-on-insulator at ST and IBM closing gap with Intel

dated 17th Apr

Silicon wafer maker Soitec S.A. claims that chip makers can sidestep years of development work needed to perfect fully-depleted (FD) silicon transistors by switching to its silicon-on-insulator (SOI) wafers, a ploy that has already convinced STMicroelectronics NV, ST-Erikson and IBM Corp. to give it a try.

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Soitec Touts FD-2D and FD-3D on SOI Wafers

dated 17th Apr

In an effort to gain a stronger foothold in the coming fully depleted CMOS era, Soitec (Bernin, France) said it is ready to provide silicon-on-insulator (SOI) wafers to both planar (FD-2D) and finFET (FD-3D) customers

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Transparent, Flexible, Scalable 3D Memory –Could it Get any Better?

dated 17th Apr

A few weeks ago, I came across an article on a new nanotechnology process in development at Rice University that can be used to build transparent, flexible 3D memory chips. According to the article, these chips could replace flash memory in thumb drives, smart phones and computers. The transparency also makes it perfect for touchscreen displays, and such futuristic concepts as smart glass for windshields that could then have functionality built into something that previously just served the purpose of optics. Really, the possibilities appear to be endless. Of course, the 3D aspect of the technology is what caught my eye, so I contacted James Tour, Ph.D, the synthetic organic chemist at Rice who is responsible for this technology, to get more details such as how these chips are manufactured, how far along in the development it is, and how it measures up cost-wise to current technologies – stuff like that

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Ritu Shrivastava 2012 Analyst Day Presentation « SanDisk etc

dated 11th Apr

So we see that NAND scaling is going to keep going for a few more generations. And the innovations and process manufacturing technologies and the kind of vertical integration that you heard about earlier from Sanjay and

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Integration, Architecture, and Applications of 3D CMOS Memristor Circuits

dated 11th Apr

Professor Tim Cheng adn Dimitri Strukov at the University of California at Santa Barbara described how 3-D techniques could realize the dream of semiconductor memristors.

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Integration, Architecture, and Applications of 3D CMOS Memristor

dated 9th Apr

In this paper, we give an overview of our recent research efforts on monolithic 3D integration of CMOS and memristive nanodevices. These hybrid circuits combine a CMOS subsystem with several layers of nanowire crossbars

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Is TSV for Real?

dated 9th Apr

Have you read some of the recent TSV headlines? 1. January 31, 2012 - CEA-Leti launched a major new platform, Open 3D, that provides industrial and academic partners with a global offer of mature 3D packaging technologies for their advanced semiconductor products and research projects.

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Is NVIDIA in a Panic? If so, what about AMD? Other fabless companies?

dated 2nd Apr

Recently I read a very uncommon report title: "NVIDIA deeply unhappy with TSMC, claims 20nm essentially worthless". Quoting directly: “One of the unspoken rules of customer-foundry relations is that you virtually never see the former speak poorly of the latter. Only when things have seriously hit the fan do partners like AMD or NVIDIA admit to manufacturing problems... That’s why we were surprised - and our source testified to being stunned - that Nvidia gave the following presentation at the International Trade Partner Conference (ITPC) forum last November”

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Could 3d Chip Technology extend Moore's law to 2030?

dated 30th Mar

Most experts believe that silicon scaling will end by 2020 at the 10 nanometer node. Although several promising post-CMOS technologies, such as graphene or III-V compound semiconductors or even spintronics might take its place, these technologies will not be deployed before 2025 at the earliest. But if the industry were to adopt and perfect 3d technology, the industry might eventually create chips with hundreds of layers. The most common form of 3d technology involves through silicon vias, but a startup company called Monolithic 3d has an alternate approach. In an interview with Sander Olson for Next Big Future, Monolithic CEO Zvi Or-Bach argues that monolithic 3d is a viable, cost-effective technology that could keep Moore's law going until 2030.

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Transparent, Flexible 3D Memory Chips Could Replace Flash

dated 30th Mar

First rumors about the demise of flash surfaces as early as 2004 when there was speculation that MRAM, OUM, PRAM or nanocrystal-supported flash would replace flash memory chips beyond the 32 nm scale by 2009. Despite the fact that flash is still going strong even in 2012, researchers believe they have identified a new technology that will replace flash someday: Transparent, flexible 3D memory chips

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Semiconductor and display fab trends gleaned from AMAT's Analyst Day

dated 29th Mar

Applied Materials Inc. (AMAT) is the leading supplier of semiconductor fabrication fab equipment to the global semiconductor industry. After Applied Materials' (AMAT) Analyst Day this week, Citi, Barclays Capital, and Credit Suisse share their bullet-point takeaways about the semiconductor and related manufacturing industries, gleaned from Applied's presentations:

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Transparent, flexible 3D memory chips may be the next big thing in small memory devices

dated 29th Mar

New memory chips that are transparent, flexible enough to be folded like a sheet of paper, shrug off 1,000-degree Fahrenheit temperatures, and survive radiation could usher in the development of next-generation flash-competitive memory says Dr. James M. Tour, Professor of Computer Science, Mechanical Engineering, and Materials Science at Rice University

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3D Chip Mania Grows but Mass Adoption Lags

dated 27th Mar

The 2.5D/3D chip era continues to gain momentum, as Altera Corp. this week made a major announcement in the arena. Indeed, the advent of 2.5D/3D chips based on through-silicon vias (TSVs) is considered a “game changer” in the semiconductor market, but mass production for the technology is still a moving target

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One On One With Mark Bohr

dated 27th Mar

Mark Bohr, senior fellow and director of Intel’s process architecture and integration, sat down with Semiconductor Manufacturing & Design to talk about his company’s push into Tri-Gate, its future SoC direction and what will drive chip design and manufacturing in the future. What follows are excerpts of that conversation.

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EDPS Monterey

dated 22nd Mar

During lunch there is a 3D IC panel moderated by Steve Leibson of Cadence: Herb Reiter; Samta Bansal of Cadence; Dusan Petranovic of Mentor; Deepak Sekar of Monolithic 3D; Steve Smith of Synopsys. Recommendations

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Memcon 2012 call for presentation submissions

dated 22nd Mar

Memcon 2012 will take place at the Santa Clara Convention Center in the heart of Silicon Valley on Tuesday, September 2012. This is the biggest conference in the world devoted to the use and manufacture of semiconductor memory (RAM, NAND … Continue reading →

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International Symposium on Quality Electronic Design Features 100

dated 13th Mar

... Study with Monolithic 3D Integration; Cost-minimized Double Die DRAM Packaging for Ultra-High Performance DDR3 and DDR4 Multi-Rank Server DIMMs; Advanced Analysis and Characterization for Sub-Micron Design

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iPad expected to dominate sales of NAND flash in media tablets at

dated 13th Mar

EL SEGUNDO, USA: With its leading market share position and high memory usage, Apple Inc.'s iPad is set to continue to dominate worldwide demand for NAND flash in media tablets at least through the year 2015, according to the IHS iSuppli Memory & Storage Service. Apple's iPad in 2011 accounted for a commanding 78 percent of global .... ECT's world's first 3D chip supporting MIPI employ... GigOptix ramps new 28Gbps modulator GX6262 driver ... GaN power

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Analyst reveals market trends for DRAM, NAND flash

dated 13th Mar

or the most part, the DRAM and NAND flash industries have been having a hard time, especially in terms of oversupply and pricing pressures. Shaky at best, the markets' foundations have been constantly struggling even at the slightest movement in the market. Looking into the future of the two segments, DRAMeXchange, a research unit of TrendForce Corp., has predicted six upcoming market trends for the industries from 2012-2015

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3D Transistor for the Common Man!

dated 6th Mar

The 1999 IDM paper Sub 50-nm FinFET: PMOS started the 3D transistor ball rolling, then in May of 2011 Intel announced a production version of a 3D transistor (TriGate) technology at 22nm. Intel is the leader in semiconductor process technologies so you can be sure that others will follow. Intel has a nice "History of the Transistor" backgrounder in case you are interested. Probably the most comprehensive article on the subject was just published by IEEE Spectrum “Transistor Wars: Rival architectures face off in a bid to keep Moore's Law alive”. This is a must read for all of us semiconductor transistor laymen.

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"Chip 2020" - The End of Scaling is 2020 - or not - Book Review

dated 6th Mar

We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi discusses about "Chip 2020" book review.

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We have a guest contribution today from Israel Beinglass, the CTO of MonolithIC 3D Inc. Israel discusses about the semiconductor equipment manufacturing: "Who wins from the recent consolidation?"

dated 27th Feb

We have a guest contribution today from Israel Beinglass, the CTO of MonolithIC 3D Inc. Israel discusses about the semiconductor equipment manufacturing: "Who wins from the recent consolidation?"

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Semiconductor Equipment Manufacturing - Who wins from the recent consolidation

dated 27th Feb

We have a guest contribution today from Israel Beinglass, the CTO of MonolithIC 3D Inc. Israel discusses about the semiconductor equipment manufacturing: "Who wins from the recent consolidation?"

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Interchip Connectivity

dated 23rd Feb

It may seem strange to link two interchip interface standards to the future of3D integrated circuits, but please bear with me for a few minutes. I hope to prove that the learning from today will impact how we design SoCs in the near future

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SanDisk co-founder: Flash to squeeze out hard drives and DRAM by

dated 23rd Feb

In much the same way that Intel has moved to FinFET to scale beyond 22nm, 3D-ReRAM is expected to take over from NAND flash at around 11nm, sometime in the next few years. It is anticipated that 3D-ReRAM will be so

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The sky is falling! The sky is falling! Paper predicts the bleak future of

dated 23rd Feb

(See “3D Thursday: A look at some genuine 3D NAND cells, courtesy of Micron” and “The End of NAND Flash as we Know It: Micron's Dean Klein and Samsung's Tony Kim Look at Life After Flash”). Micron 3D NAND Flash

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Could the memory business be a major driver for the semiconductor

dated 6th Feb

Deepak Sekar, Chief Scientist at MonolithIC 3D, has just published a provocative blog with big implications for both the semiconductor memory and foundry businesses. His premise is that even though Samsung has “only”

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Why Samsung will give Morris Chang sleepless nights

dated 6th Feb

Samsung contributes just 7% to the world’s foundry revenue today. But here’s why it could be TSMC’s biggest challenge yet...

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Novellus Sees China, Wafer-Level Packaging, 3D NAND as Market Drivers

dated 3rd Feb

Wafer-level packaging and 3D NAND are two market drivers that will propel revenues at the combined Lam-Novellus operation this year and next, chief operating officer Tim Archer said

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Next-generation Memory Vendors Seek New Markets

dated 3rd Feb

Several years ago, an executive from Intel Corp. declared that flash memory would run out of gas and would stop scaling at about 90nm, prompting the need for a next-generation — or universal — memory type. FRAM, MRAM, phase-change, ReRAM and others fall into the so-called universal memory category. Developers of these technologies claim their respective technologies can replace DRAM, NAND, NOR — or all three

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Is Monolithic 3D-IC less risky than scaling or TSV?

dated 31st Jan

I recently saw this great 5 minute video by Applied Material’s Richard Lewington [AMAT 3D Blog Video] where three types of 3D-IC construction are demonstrated. Note that the first two 3D-IC options he shows (with those plastic blocks) are monolithic. Only the third option is TSV based

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Monolithic 3D repairing itself

dated 30th Jan

One of the commonly quoted challenges for wafer-level 3D-IC stacking is yield. ... MonolithIC 3D Inc. claims its yield repair scheme could allow excellent yields for 3D-ICs constructed with dozens of stacked wafers. In addition

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Monolithic 3D: A Basic Primer

dated 30th Jan

Ever since I put on the editorial director hat for 3D-ICs.com, which aggregates 3D technology news, blogs and papers, and categorizes them as either TSV and 3D packaging or monolithic 3D, I’ve been trying to wrap my head around the differences between 3D TSVs and monolithic 3D integration technologies. I’ve got 2.5 D and 3D TSVs down pat, but the monolithic thing was really eluding me. I decided the best course of action was to tap into an expert in the monolithic realm. Who better to talk to than Zvi Or-Bach, CEO of MonilithIC 3D? I figured if his company carries the technology name, he must know the most about it. I wasn’t disappointed. Or-Bach graciously explained it all to me, right down to the fundamentals. Now that I’ve got it all straightened out, I figured 3D InCites readers could benefit from this knowledge as well

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The Why and How of Fine-Grain 3D Integration

dated 23rd Jan

Today, we'll discuss why TSV pitches smaller than 500nm are useful and how one can achieve that. Evolutionary advances with today's TSV technology as well as radically new monolithic 3D approaches are options. The Silicon Valley IEEE Components, Packaging and Manufacturing Technology (CPMT) Society invited me to give a talk on "Fine-Grain 3D Integration" last wee [...]

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Repair in 3D Stacks: The Path to 100% Yield with No Chip Size Limits

dated 17th Jan

Picture We have a guest contribution today from Ze'ev Wurman, MonolithIC 3D Inc.'s Chief Software Architect. Ze'ev discusses yield and repair issues with 3D stacked chips

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Hill: 2012 to Beat Prognosticators Forecasts

dated 13th Jan

Novellus Systems CEO Rick Hill, in what may be one of his last public appearances in that role, said orders for semiconductor equipment are strengthening and 2012 may turn out to be much better than prognosticators are forecasting. Speaking early Thursday (Jan. 12) at the Needham Growth Conference for investors, Hill said “the force fields are in place” for 2012 to be “flat to slightly up” in terms of semiconductor equipment revenues

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Samsung’s Regrettable Moment and the Coming of 3D Tick Tock!

dated 11th Jan

The might have beens. The shoulda's, coulda's, woulda's are what launches a thousand Harvard Business School Case Studies that are meant to prepare a generation of business leaders on how to make decisions that impact the future directions of companies. Right before the 2008 financial crises (September 5, 2008), Samsung made a run at Sandisk in order to reduce its NAND Flash royalty payments. A year later, Sandisk rejected Samsung’s final offer for what would be half the value of the company today. Samsung can look back and say that was a big fork in the road and hopefully for them it wasn’t a “stick a fork in it” moment.

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MonolithIC 3D Inc. Announces 3D NAND Flash Memory Solution with Monocrystalline Silicon

dated 4th Jan

MonolithIC 3D Inc., a leading 3D-IC company, announced its Ultra-Scale Integration scheme last week. ThMonolithIC 3D Inc., a leading 3D-IC company, announced its 3D NAND flash memory technology yesterday. The technology, interestingly, uses monocrystalline silicon for transistors in contrast to the polysilicon approaches of companies such as Toshiba, Samsung, Hynix and Micron. Considering that monocrystalline silicon offers 3x-6x higher mobility and dramatically lower variability compared to polysilicon, the quality of memory cells is expected to be significantly better.

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View from the top: Joe Sawicki

dated 26th Dec

Joe Sawicki is the VP and General Manager at Mentor Graphics for the Design-to-Silicon Division where the Calibre product line is developed. We met today in Wilsonville, Oregon to review the challenges in IC design, processing and manufacturing

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MonolithIC 3D Inc. Announces 3D NAND Flash Memory Solution

dated 15th Dec

Toshiba, Samsung, Hynix and Micron have aggressively invested in monolithic 3D technologies, and impressive progress is being made with every passing day. Dr. Deepak Sekar, the Chief Scientist of MonolithIC 3D Inc.,

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Monolithic 3D IC Could Increase Circuit Integration by 1,000x

dated 15th Dec

We have a guest contribution from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi introduces a very interesting idea that could have huge implications for high-performance computing

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The Flash Industry's Direction, and MonolithIC 3D Inc.'s Solution

dated 12th Dec

Toshiba, Samsung, Hynix and Micron are developing polysilicon-based monolithic 3D flash memories. Today, I’ll talk about these and also introduce our company's monocrystalline silicon solution

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Do Foundries Have Too much Power?

dated 9th Dec

We have a guest contribution today from Israel Beinglass, the CTO of MonolithIC 3D Inc. Israel discusses the foundry industry's history as well as its current landscape

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3D NAND and 3D ReRAM « SanDisk etc

dated 5th Dec

Time to wrap up this first pass at 3D NAND. There are a couple of points which I didn’t get to in the first two posts, which I’ll touch on here. Of particular interest is the relationship of 3D NAND to future post-NAND memory technologies, specifically ReRAM

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What can 20MW Exascale computers teach us about SoC

dated 30th Nov

Sekar is MonolithIC 3D's Chief Scientist, so I suppose I should also sport those credentials to wade in here with Sekar and Dally, but as they say, fools rush in where angels fear to tread. So here goes. Sekar's latest blog entry

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Analyst: Samsung to Ramp 16nm NAND Flash

dated 30th Nov

Over the years, NAND flash vendors have leapfrogged each another for the process technology lead in the arena. Most recently, the Intel-Micron duo were the leaders in April, when the two NAND manufacturing venture partners rolled out a 20nm process technology and the associated 20nm parts. Intel Corp. and Micron Technology Inc. have a joint NAND manufacturing venture, dubbed IM Flash Technologies LLC (IMFT)

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Korea as a Memory Hub and India as a ... ? « Pune's Semi/EDA

dated 28th Nov

I came across a blog written by Deepak Sekar, the Chief Scientist at Monolithic 3D and he makes several interesting points as to how Korea became the De-facto memory hub. The story of Korea in the 1960s and where India

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The Dally-nVIDIA-Stanford Prescription for Exascale Computing

dated 28th Nov

Bill Dally, Chief Scientist of nVIDIA and Professor at Stanford University, gave a great keynote speech on the future of computing recently. Let's discuss his presentation today...

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Building 3D-ICs: Tool Flow and Design Software Part 2

dated 21st Nov

The industry’s current enthusiasm for 3D-ICs is widespread and well warranted, but designing those 3D devices presents a challenge. Normal 2D tool flows, thoroughly honed and refined over many years, nonetheless fail to address some of the critical issues of 3D design. A new 3D design process is evolving gradually from that 2D heritage. When Tezzaron designed its first 3D circuits in 2003, the designers used standard 2D CAD tools and cobbled together a 3D DRC and LVS flow based on scripts. Today there are tools to handle a complete backend flow and strides are being made to enable true 3D design partitioning, synthesis, placement, and routing (see Figure 1)

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How Korea Became the Hub of the Memory Industry

dated 21st Nov

As you'd know, Korean companies such as Samsung and Hynix contribute 50-60% of the world's memory revenues. In today's blog post, we’ll look at reasons and strategies behind this dominance...

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Is Monolithic 3D IC a disruptive technology for the Semiconductor Industry?!

dated 17th Nov

We have a guest contribution today from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. Zvi discusses Monolithic 3D's potential impact on the semiconductor industry... Recently EE Times quoted Shang-Yi Chiang, senior vice president of R&D at TSMC: "The path is clear for continued semiconductor scaling using FinFETs for the next decade, down to the 7-nm node". Yet, at the time, EE Times quoted Chi-Ping Hsu, senior vice president at Cadence: “Process R&D, for instance, jumped from $1.2 billion at 32/28nm to between $2.1 billion and $3 billion at 22/20nm". So clearly the “clear path” is associated with escalating costs

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3D Thursday: Can we achieve true 3D IC manufacturing?

dated 16th Nov

My last panelist, Zvi Or-Bach, is President and CEO at MonolithIC 3D, is a serial semiconductor entrepreneur. He’s not content with the benefits of 2.5D and 3D assembly. His company is shooting for true 3D IC manufacturing.

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Building 3D-ICs: Tool Flow and Design Software

dated 14th Nov

The industry’s current enthusiasm for 3D-ICs is widespread and well warranted, but designing those 3D devices presents a challenge. Normal 2D tool flows, thoroughly honed and refined over many years, nonetheless fail to address some of the critical issues of 3D design. A new 3D design process is evolving gradually from that 2D heritage

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3D Transistors @ TSMC 20nm!

dated 7th Nov

Ever since the TSMC OIP Forum where Dr. Shang-Yi Chiang openly asked customers, “When do you want 3D Transistors (FinFETS)?” I have heard quite a few debates on the topic inside the top fabless semiconductor companies. The bottom line, in my expert opinion, is that TSMC will add FinFETS to the N20 (20nm) process node in parallel with planar transistors and here are the reasons why:

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I-Micronews - ADVANCED PACKAGING: 3D IC, WLP & TSV

dated 2nd Nov

Sometimes we get questions about a particular aspect of the monolithic 3DIC flow. In this blog I would like to talk about Low Temperature Wafer Direct Bonding, where an important concern is the strength of the wafer to wafer

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CAD for 3D-IC Technology

dated 2nd Nov

We have a blog post today from Ze'ev Wurman, the Chief Software Architect of MonolithIC 3D Inc. Ze'ev spent many years leading EDA/software work at Dynachip, eASIC and Amdahl. He will discuss CAD tools for 3D-ICs. With so many people talking about 3D chips, it’s time to focus on the CAD tool support for them. I find it easiest to look over the CAD landscape using two distinct views.

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Technical Analysis of Achieving sub-5nm CMOS

dated 31st Oct

It is commonly believed that the fundamental limit to MOSFET feature-size scaling is direct source-drain tunneling. We may hit this limitation around the 5nm node.

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Is there a Fundamental Limit to Miniaturizing CMOS Transistors?

dated 31st Oct

It is commonly believed that the fundamental limit to MOSFET feature-size scaling is direct source-drain tunneling. We may hit this limitation around the 5nm node. Is that the end of the road for CMOS Scaling? Last week, during a dinner conversation with colleagues, the topic of scaling limits came up. Hmmm... I thought. Let me study this issue

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Transistor Wars

dated 31st Oct

Rival architectures face off in a bid to keep Moore's Law alive

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True or False? Monolithic 3D chips were Comercialized 8 Years Back?

dated 29th Oct

Believe it or not, the answer is True! Who did it? It was Matrix Semiconductor, a Silicon Valley startup, who shipped the world's first monolithic 3D products in 2003. These were One-Time Programmable (OTP) non-volatile memory chips that had multiple layers of polysilicon diodes in series with antifuses. See picture alongside

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Low Temperature Wafer Direct Bonding

dated 27th Oct

Picture We have a guest contribution today from Brian Cronquist, MonolithIC 3D Inc.'s VP of Technology. Brian shares his perspective on Low Temperature Wafer Direct Bonding, where an important concern is the strength of the wafer to wafer oxide to oxide bond

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Technical Analysis of achieving sub 5 nanometer CMOS

dated 24th Oct

Furthermore, moving to recessed channel devices could enable easy implementation of Monolithic 3D-ICs. See this page ... The NAND flash industry has monolithic 3D on their roadmap in the next 2-3 years. If you liked this

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The Quad Patterning Era Begins

dated 24th Oct

Last week, the industry was abuzz with news of Hynix's 15nm NAND flash memory technology. This important milestone brings our industry into the quad patterning era. I'll talk about quad patterning and its implications today

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Achieving Success in the Age of Nano Tech

dated 21st Oct

We have a guest contribution today from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. In this post, Zvi shares his perspective on where the industry is going after attending the recent Future Horizons conference (IEF-2011)

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3D Thursday: Looking for some 3D IC power-distribution strategies?

dated 20th Oct

Deepak Sekar, Chief Scientist of MonolithIC 3D Inc, published a blog about power distribution in 3D ICs way back in March but a recent discussion post on LinkedIn has highlighted it once again. Sekar writes about several ways to approach the problem of distributing power on 3D ICs but perhaps the last two sentences in his post is the one to read first:

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Through-silicon via technology revolutionises chips

dated 19th Oct

hrough-silicon via (TSV) on chip interconnection of memory, processor and sensor elements looks the most likely route for 3D chip design, writes Richard Wilson

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Timing Is Everything - The concept of 3D IC has been around for decades so why now?

dated 19th Oct

We all hear "Timing is Everything", and it is so very true for a startup - too early could be as bad as too late. Being an entrepreneur, I am probably far too optimistic to present an objective view and especially with respect to the Monolithic 3D-IC. So you could be the judge and hopefully reality will soon provide the final judgment.

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Chip Makers Intensify Race in 3D DRAM Market

dated 19th Oct

The 3D DRAM race is heating up, as more companies are teaming up to share the costs and accelerate the development of the technology. Last week, two memory rivals — Micron and Samsung — formed an alliance to devise 3D DRAMs using a stacked through-silicon-via (TSV) technology. Another 3D DRAM alliance — which includes Elpida, Powertech and UMC — last week revealed more details about its strategy. And recently, Hynix formed a 3D DRAM partnership with Sematech

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Perspectives on 3D Integration: The Researchers

dated 14th Oct

To listen to John Lau, of ITRI, speak on the topic of 3D integration is to experience a passion for technology that rivals no other; except perhaps that of Rao Tummala of Georgia Tech. But John is definitely more vocal in his passion. Rao has a softer, gentler approach. At this year’s IWLPC in Santa Clara, both expressed their perspectives on what they see as the most cost effective and immediately available path to achieving 3D integration using passive TSV interposers as either substrates or carriers

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3D Thursday: Hybrid Memory Cube—wide I/O only more so—gets an industry consortium

dated 14th Oct

Back in August, I wrote about the 3D SDRAM assembly called the Micron Hybrid Memory Cube (HMC, see “Want to know more about the Micron Hybrid Memory Cube (HMC)? How about its terabit/sec data rate?”) and I called it a “killer app” for 3D IC assembly. Last week, founding members Micron and Samsung announced the Hybrid Memory Cube Consortium (HMCC) dedicated to expanding “the capabilities of the next generation of memory-based solutions.” Current “Developer Member” companies include Altera, Micron, Open-Silicon, Samsung, and Xilinx

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I-Micronews - ADVANCED PACKAGING: 3D IC, WLP & TSV : The

dated 10th Oct

Home > ADVANCED PACKAGING: 3D IC, WLP & TSV > The Intel “Tri-Gate Transistor” structure: a closer look... > ADVANCED PACKAGING: 3D IC, WLP & TSV. Oct 4th, 2011. The Intel “Tri-Gate Transistor” structure: a closer look. At the most

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Education News » Upon further review…Paul Gross' critique of the

dated 10th Oct

Guest blogger Ze'ev Wurman, an executive with Monolithic 3D, a Silicon Valley startup, has participated in developing California's education standards and assessments in mathematics since the mid-1990s. Between 2007

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More 3D NAND

dated 10th Oct

D NAND has the potential and the promise to supplant 2D planar NAND. Whether it will or not remains to be seen. Challenges remain leading up to commercialization. But the race is certainly on. Equipment makers, such as Novellus, are saying that 3D NAND pilot lines will likely be up and running in 2013 and if all goes well volume production will commence a year later in 2014

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3D Thursday: The elephant that's 3D—Musings about 3D chip

dated 1st Oct

There is a big difference between TSV type 3D IC and what I am talking about – monolithic 3D (10000x vertical connectivity)! With monolithic 3D IC every folding is equivalent for 1 node of scaling from every point one look at.

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MonolithIC 3D Inc. Voices Concern that K-12 Science Framework

dated 1st Oct

MonolithIC 3D Inc., a Silicon Valley company, says the framework does not call for using analytical mathematics such as algebra, trigonometry and calculus for studying science problems. Mathematical concepts are the

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I-Micronews - ADVANCED PACKAGING: 3D IC, WLP & TSV : New

dated 1st Oct

... to achieve higher levels of manufacturing efficiency for such applications as backside illuminated (BSI) CMOS image sensors, 3D integration of CMOS image sensors, and monolithic 3D integration of memory devices.

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3D Thursday: A look at some genuine 3D NAND cells, courtesy of Micron

dated 1st Oct

It’s time to think vertically. Geometry shrinks are slowing down and its getting harder and harder to shift to the next process node with each jump. The answer is 3D NAND. We need to break through into another dimension

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Flash Memory Summit: New Insights Into the Future of NAND Flash

dated 1st Oct

With deployment in some 5 billion mobile devices worldwide, flash memory has been wildly successful. But where will nonvolatile memory technology go from here, and how much further can it scale? Some answers emerged from three keynote speeches at the Flash Memory Summit August 9

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3D NAND

dated 1st Oct

NAND as we know it is reaching the end of the line. It’s been a good run. But Judgement Day is Coming!

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Who might be the winners and losers in a jump from 300mm to

dated 1st Oct

Deepak Sekar, Chief Scientist of MonolithIC 3D, has just published a really interesting blog post with a somewhat cryptic title, in my opinion. The title of the post is “Can 450mm Decommoditize the Semiconductor Industry?

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Laser thermal anneal to boost performance of 3D memory devices

dated 0th

Nanoelectronics research center imec and Excico have successfully demonstrated the application of laser thermal anneal (LTA) to boost the current in vertical polysilicon channel devices for 3D memory.

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Samsung, Micron bake 3D chips for next-gen RAM

dated 0th

We're hitting a memory wall, if you didn't know, and processor cores are going to be held up because DRAM can't scale up enough or ship 'em data fast enough. Samsung and Micron aim to fix that with 3D memory cubes and a consortium to define an interface spec for them

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The Future is the Interconnect IITC

dated 0th

The next International Interconnect Technology Conference (IITC 2012) will be held in San Jose in a couple of weeks (June 4-6). This is a good opportunity to recall that, in some sense, the reason for scaling silicon down has changed in recent years from packing more transistors in a square (or cubic) millimeter to increasing functionality and performance at reduced power. An ever higher fraction of the power dissipation resides in the interconnect – both in the net switching itself as well as in the ever-increasing number of repeaters required to re-power more and more “long” nets

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